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Created Known Issues and Future work (markdown)

David Banks 2016-07-13 13:02:40 +01:00
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Known-Issues-and-Future-work.md Normal file

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### Known Issues
* The GODIL contains 1K5 pull-ups to +5V on all pins. This can raise the logic zero threshold of inputs driving the ICE module, and which can result in reduced noise margin. See the [[ICE-T80]] for more information on the type of problem this can cause on real systems.
* On ICE-T65 the timing of the outputs (Address, RnW, etc) wrt Phi2 is somewhat faster than a typical real 6502 (80ns rather than the 130ns which is typical). This does not seem to cause any issues.
### Future Work
* Need to update the T65 core to the latest version from Wolfgang/MikeJ at fpgaarcade