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Updated Known Issues and Future work (markdown)
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* On ICE-T65 the timing of the outputs (Address, RnW, etc) wrt Phi2 is somewhat faster than a typical real 6502 (80ns rather than the 130ns which is typical). This does not seem to cause any issues.
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* On ICE-T65 the external RDY input is currently ignored.
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### Future Work
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* Need to update the T65 core to the latest version from Wolfgang/MikeJ at fpgaarcade
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