Updated Known Issues and Future work (markdown)

David Banks 2016-07-15 11:33:29 +01:00
parent 65e31031bf
commit e10968f0eb

@ -4,6 +4,8 @@
* On ICE-T65 the timing of the outputs (Address, RnW, etc) wrt Phi2 is somewhat faster than a typical real 6502 (80ns rather than the 130ns which is typical). This does not seem to cause any issues.
* On ICE-T65 the external RDY input is currently ignored.
### Future Work
* Need to update the T65 core to the latest version from Wolfgang/MikeJ at fpgaarcade