/* Definitions for A02 Assembler */

#define MAXSTR 128  //Maximum String Length
#define MAXLBL 8    //Maximum Symbol Length
#define MAXSYM 1024  //Maximum Number of Labels

//#define NULL &0

#define FALSE 0
#define TRUE -1

/* Address Mode Bit Masks */
#define RGSTR 0x0000  //Register (Sweet 16)
#define ACMLT 0x0001  //Accumulator [$xA]
#define IMMDT 0x0002  //*Immediate [w/Acc]
#define ZPAGE 0x0004  //Zero Page
#define ZPAGX 0x0008  //*Zero Page,X
#define RGIND 0x0010  //Register or Imderect (Sweet 16)
#define ABSLT 0x0020  //Absolute
#define ABSLX 0x0040  //*Absolute,X [fixops()]
#define ABSLY 0x0080  //Absolute,Y 
#define IMPLD 0x0100  //*Implied [x0001]
#define INDCT 0x0200  //(Indirect)
#define INDCX 0x0400  //(Indirect,X)
#define INDCY 0x0800  //(Indirect),Y
#define RELTV 0x1000  //Relative

char zpgabs[][9] = {"Absolute", "ZeroPage"};

/* Address Mode Descriptions */
struct amd {int amode; char desc[12];};
struct amd amdesc[] = {
  {ACMLT, "Accumulator"},
  {IMMDT, "Immediate"}, 
  {ZPAGE, "Zero Page"}, 
  {ZPAGX, "Zero Page,X"}, 
  {ABSLT, "Absolute"}, 
  {RGSTR, "Register"}, 
  {ABSLX, "Absolute,X"}, 
  {ABSLY, "Absolute,Y"}, 
  {IMPLD, "Implied"}, 
  {INDCT, "(Indirect)"}, 
  {INDCX, "(Indirect,X)"}, 
  {INDCY, "(Indirect),Y"}, 
  {RELTV, "Relative"}, 
  {0, ""}
};

struct opc {char name[5], token; int amode;};
struct opc psolst[] = {
  {"BYTE", 'B', 0}, {"HEX", 'H'}, {"WORD", 'W', 0}, {"EQU", '=', 0}, {"FILL", 'F', 0}, 
  {"INCL", 'I', 0}, {"SUBR", 'S', 0}, {"DC", 'B', 0}, {"DS", 'F', 0}, {"ALIG", 'A', 0},
  {"ORG", '*', 0}, {"PROC", 'P', 0}, {"END", 'E', 0}, {"ENDS", 'M', 0}, {"EXEC", 'X', 0},
  {"DW", 'W', 0}, {"", 0, 0}
};

struct opc opclst[] = {
  {"BRK", 0x00, 0x0100}, {"NOP", 0xEA, 0x0100}, {"STP", 0xDB, 0x0100}, {"WAI", 0xCB, 0x0100},
  {"DEX", 0xCA, 0x0100}, {"DEY", 0x88, 0x0100}, {"INX", 0xE8, 0x0100}, {"INY", 0xC8, 0x0100},
  {"PHA", 0x48, 0x0100}, {"PHP", 0x08, 0x0100}, {"PHX", 0xDA, 0x0100}, {"PHY", 0x5A, 0x0100},
  {"PLA", 0x68, 0x0100}, {"PLP", 0x28, 0x0100}, {"PLX", 0xFA, 0x0100}, {"PLY", 0x7A, 0x0100},
  {"CLC", 0x18, 0x0100}, {"CLD", 0xD8, 0x0100}, {"CLI", 0x58, 0x0100}, {"CLV", 0xB8, 0x0100},
  {"SEC", 0x38, 0x0100}, {"SED", 0xF8, 0x0100}, {"SEI", 0x78, 0x0100},
  {"TAX", 0xAA, 0x0100}, {"TAY", 0xA8, 0x0100}, {"TSX", 0xBA, 0x0100},
  {"TXA", 0x8A, 0x0100}, {"TYA", 0x98, 0x0100}, {"TXS", 0x9A, 0x0100},
  {"RTI", 0x40, 0x0100}, {"RTS", 0x60, 0x0100},
  
  {"BCS", 0xB0, 0x1000}, {"BEQ", 0xF0, 0x1000}, {"BMI", 0x30, 0x1000}, {"BVS", 0x70, 0x1000},
  {"BCC", 0x90, 0x1000}, {"BNE", 0xD0, 0x1000}, {"BPL", 0x10, 0x1000}, {"BVC", 0x50, 0x1000},
  {"BRA", 0x80, 0x1000},

  {"LDA", 0xA1, 0x0EFE}, {"ADC", 0x61, 0x0EFE}, {"AND", 0x21, 0x0EFE}, {"CMP", 0xC1, 0x0EFE},
  {"STA", 0x81, 0x0EFE}, {"SBC", 0xE1, 0x0EFE}, {"ORA", 0x01, 0x0EFE}, {"EOR", 0x41, 0x0EFE},
  
  {"ASL", 0x02, 0x007D}, {"ROL", 0x22, 0x007D}, {"INC", 0xE2, 0x007D}, {"LSR", 0x42, 0x007D},
  {"ROR", 0x62, 0x007D}, {"DEC", 0xC2, 0x007D}, 

  {"RMB0", 0x07, 0x0004}, {"RMB1", 0x17, 0x0004}, {"RMB2", 0x27, 0x0004}, {"RMB3", 0x37, 0x0004}, 
  {"RMB4", 0x47, 0x0004}, {"RMB5", 0x57, 0x0004}, {"RMB6", 0x67, 0x0004}, {"RMB7", 0x77, 0x0004}, 
  {"SMB0", 0x87, 0x0004}, {"SMB1", 0x97, 0x0004}, {"SMB2", 0xA7, 0x0004}, {"SMB3", 0xB7, 0x0004}, 
  {"SMB4", 0xC7, 0x0004}, {"SMB5", 0xD7, 0x0004}, {"SMB6", 0xE7, 0x0004}, {"SMB7", 0xF7, 0x0004}, 
  {"RMB",  0x07, 0x0004}, {"SMB", 0x87, 0x0004},

  {"BBR0", 0x0F, 0x1004}, {"BBR1", 0x1F, 0x1004}, {"BBR2", 0x2F, 0x1004}, {"BBR3", 0x3F, 0x1004}, 
  {"BBR4", 0x4F, 0x1004}, {"BBR5", 0x5F, 0x1004}, {"BBR6", 0x6F, 0x1004}, {"BBR7", 0x7F, 0x1004}, 
  {"BBS0", 0x8F, 0x1004}, {"BBS1", 0x9F, 0x1004}, {"BBS2", 0xAF, 0x1004}, {"BBS3", 0xBF, 0x1004}, 
  {"BBS4", 0xCF, 0x1004}, {"BBS5", 0xDF, 0x1004}, {"BBS6", 0xEF, 0x1004}, {"BBS7", 0xFF, 0x1004}, 
  {"BBR", 0x0F, 0x1004}, {"BBS", 0x8F, 0x1004},

  {"TRB", 0x10, 0x0024}, {"TSB", 0x00, 0x0024},
  {"CPX", 0xE0, 0x0026}, {"CPY", 0xC0, 0x0026},
  {"LDX", 0xA2, 0x00A6}, {"STX", 0x82, 0x00A6},
  {"BIT", 0x20, 0x006E},
  {"STZ", 0x60, 0x006C},
  {"JMP", 0x4C, 0x0620},
  {"JSR", 0x14, 0x0020}, 
  {"LDY", 0xA0, 0x006E},
  {"STY", 0x80, 0x002C},
  {"", 0, 0}
};

struct opf {unsigned char token, opmod, opcode;};

struct opf opfix[] = {
  {0x20, 0x08, 0x89},
  {0xE0, 0x08, 0xE0}, 
  {0xC0, 0x08, 0xC0}, 
  {0xA0, 0x08, 0xA0}, 
  {0xA2, 0x08, 0xA2}, 
  {0xC2, 0x08, 0x3A},
  {0xE2, 0x08, 0x1A},  
  {0x60, 0x0C, 0x9C},  
  {0x60, 0x1C, 0x9E},  
  {0xA2, 0x18, 0xBE},
  {0x82, 0x18, 0xBC},
  {0x4C, 0x0C, 0x4C},  
  {0x4C, 0x11, 0x6C},  
  {0x4C, 0x00, 0x7C},  
  {0,0,0}
};

/* Sweet 16 Address Modes
  IMPLD - Implied (No Argument)
  RGSTR - Register
  INDCT - Register Indirect
  ABSLT - Register Absolute
  RKLTV - Relative (Branch)
  RGIND - Register or Indirect
*/

/* Sweet 16 OpCodes */
struct opc swolst[] = {
  {"RTN",  0x00, IMPLD}, {"BR",   0x01, RELTV}, {"BNC", 0x02, RELTV}, {"BC",   0x03, RELTV}, 
  {"BP",   0x04, RELTV}, {"BM",   0x05, RELTV}, {"BZ",  0x06, RELTV}, {"BNZ",  0x07, RELTV}, 
  {"BM1",  0x08, RELTV}, {"BNM1", 0x09, RELTV}, {"BK",  0x0A, IMPLD}, {"RS",   0x0B, IMPLD}, 
  {"BS",   0x0C, RELTV}, {"SET",  0x10, ABSLT}, {"LD",  0x20, RGIND}, {"ST",   0x30, RGIND}, 
  {"LD",   0x40, INDCT}, {"ST",   0x50, INDCT}, {"LDD", 0x60, INDCT}, {"STD",  0x70, INDCT}, 
  {"POP",  0x80, INDCT}, {"STP",  0x90, INDCT}, {"ADD", 0xA0, RGSTR}, {"SUB",  0xB0, RGSTR}, 
  {"POPD", 0xC0, INDCT}, {"CPR",  0xD0, RGSTR}, {"INR", 0xE0, RGSTR}, {"DCR",  0xF0, RGSTR}
};