1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-17 10:06:21 +00:00
CLK/Processors/RegisterSizes.hpp

40 lines
678 B
C++
Raw Normal View History

//
// RegisterSizes.hpp
// Clock Signal
//
// Created by Thomas Harte on 14/05/2017.
// Copyright 2017 Thomas Harte. All rights reserved.
//
#ifndef RegisterSizes_hpp
#define RegisterSizes_hpp
#include <cstdint>
namespace CPU {
2019-03-10 02:16:11 +00:00
template <typename Full, typename Half> union RegisterPair {
RegisterPair(Full v) : full(v) {}
2017-05-29 23:25:08 +00:00
RegisterPair() {}
2019-03-10 02:16:11 +00:00
Full full;
#pragma pack(push, 1)
#if TARGET_RT_BIG_ENDIAN
struct {
2019-03-10 02:16:11 +00:00
Half high, low;
} halves;
#else
struct {
Half low, high;
} halves;
#endif
#pragma pack(pop)
};
2019-03-10 02:16:11 +00:00
typedef RegisterPair<uint16_t, uint8_t> RegisterPair16;
typedef RegisterPair<uint32_t, RegisterPair16> RegisterPair32;
2019-03-10 02:16:11 +00:00
}
#endif /* RegisterSizes_hpp */