2017-07-31 02:05:29 +00:00
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//
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// AmstradCPC.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 30/07/2017.
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// Copyright © 2017 Thomas Harte. All rights reserved.
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//
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#include "AmstradCPC.hpp"
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using namespace AmstradCPC;
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2017-07-31 11:29:50 +00:00
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Machine::Machine() {
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// primary clock is 4Mhz
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set_clock_rate(4000000);
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}
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2017-07-31 02:05:29 +00:00
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HalfCycles Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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2017-07-31 11:29:50 +00:00
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// Amstrad CPC timing scheme: assert WAIT for three out of four cycles
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clock_offset_ = (clock_offset_ + cycle.length) & HalfCycles(7);
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set_wait_line(clock_offset_ >= HalfCycles(2));
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2017-07-31 02:05:29 +00:00
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return HalfCycles(0);
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}
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void Machine::flush() {
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}
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void Machine::setup_output(float aspect_ratio) {
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2017-07-31 11:16:51 +00:00
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crt_.reset(new Outputs::CRT::CRT(256, 1, Outputs::CRT::DisplayType::PAL50, 1));
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crt_->set_rgb_sampling_function(
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"vec3 rgb_sample(usampler2D sampler, vec2 coordinate, vec2 icoordinate)"
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"{"
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"return vec3(1.0);"
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"}");
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2017-07-31 02:05:29 +00:00
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}
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void Machine::close_output() {
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}
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std::shared_ptr<Outputs::CRT::CRT> Machine::get_crt() {
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2017-07-31 11:16:51 +00:00
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return crt_;
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2017-07-31 02:05:29 +00:00
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}
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std::shared_ptr<Outputs::Speaker> Machine::get_speaker() {
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return nullptr;
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}
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void Machine::run_for(const Cycles cycles) {
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2017-07-31 11:29:50 +00:00
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CPU::Z80::Processor<Machine>::run_for(cycles);
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2017-07-31 02:05:29 +00:00
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}
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void Machine::configure_as_target(const StaticAnalyser::Target &target) {
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}
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