mirror of
https://github.com/TomHarte/CLK.git
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362 lines
9.6 KiB
C++
362 lines
9.6 KiB
C++
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//
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// ShiftRoll.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 08/11/2023.
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// Copyright © 2023 Thomas Harte. All rights reserved.
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//
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#ifndef ShiftRoll_hpp
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#define ShiftRoll_hpp
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#include "../AccessType.hpp"
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namespace InstructionSet::x86::Primitive {
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template <typename IntT, typename ContextT>
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void rcl(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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/*
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(* RCL and RCR instructions *)
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SIZE ← OperandSize
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CASE (determine count) OF
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SIZE = 8: tempCOUNT ← (COUNT AND 1FH) MOD 9;
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SIZE = 16: tempCOUNT ← (COUNT AND 1FH) MOD 17;
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SIZE = 32: tempCOUNT ← COUNT AND 1FH;
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ESAC;
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*/
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/*
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(* RCL instruction operation *)
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WHILE (tempCOUNT ≠ 0)
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DO
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tempCF ← MSB(DEST);
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DEST ← (DEST * 2) + CF;
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CF ← tempCF;
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tempCOUNT ← tempCOUNT – 1;
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OD;
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ELIHW;
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IF COUNT = 1
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THEN OF ← MSB(DEST) XOR CF;
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ELSE OF is undefined;
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FI;
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*/
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/*
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The CF flag contains the value of the bit shifted into it.
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The OF flag is affected only for single- bit rotates (see “Description” above);
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it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected.
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*/
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const auto temp_count = count % (Numeric::bit_size<IntT>() + 1);
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auto carry = context.flags.template carry_bit<IntT>();
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switch(temp_count) {
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case 0: break;
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case Numeric::bit_size<IntT>(): {
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const IntT temp_carry = destination & 1;
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destination = (destination >> 1) | (carry << (Numeric::bit_size<IntT>() - 1));
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carry = temp_carry;
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} break;
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default: {
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const IntT temp_carry = destination & (Numeric::top_bit<IntT>() >> (temp_count - 1));
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destination =
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(destination << temp_count) |
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(destination >> (Numeric::bit_size<IntT>() + 1 - temp_count)) |
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(carry << (temp_count - 1));
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carry = temp_carry ? 1 : 0;
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} break;
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}
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context.flags.template set_from<Flag::Carry>(carry);
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context.flags.template set_from<Flag::Overflow>(
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((destination >> (Numeric::bit_size<IntT>() - 1)) & 1) ^ carry
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);
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}
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template <typename IntT, typename ContextT>
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void rcr(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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/*
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(* RCR instruction operation *)
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IF COUNT = 1
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THEN OF ← MSB(DEST) XOR CF;
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ELSE OF is undefined;
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FI;
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WHILE (tempCOUNT ≠ 0)
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DO
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tempCF ← LSB(SRC);
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DEST ← (DEST / 2) + (CF * 2SIZE);
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CF ← tempCF;
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tempCOUNT ← tempCOUNT – 1;
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OD;
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*/
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auto carry = context.flags.template carry_bit<IntT>();
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context.flags.template set_from<Flag::Overflow>(
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((destination >> (Numeric::bit_size<IntT>() - 1)) & 1) ^ carry
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);
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const auto temp_count = count % (Numeric::bit_size<IntT>() + 1);
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switch(temp_count) {
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case 0: break;
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case Numeric::bit_size<IntT>(): {
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const IntT temp_carry = destination & Numeric::top_bit<IntT>();
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destination = (destination << 1) | carry;
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carry = temp_carry;
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} break;
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default: {
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const IntT temp_carry = destination & (1 << (temp_count - 1));
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destination =
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(destination >> temp_count) |
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(destination << (Numeric::bit_size<IntT>() + 1 - temp_count)) |
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(carry << (Numeric::bit_size<IntT>() - temp_count));
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carry = temp_carry;
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} break;
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}
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context.flags.template set_from<Flag::Carry>(carry);
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}
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template <typename IntT, typename ContextT>
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void rol(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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/*
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(* ROL and ROR instructions *)
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SIZE ← OperandSize
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CASE (determine count) OF
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SIZE = 8: tempCOUNT ← COUNT MOD 8;
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SIZE = 16: tempCOUNT ← COUNT MOD 16;
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SIZE = 32: tempCOUNT ← COUNT MOD 32;
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ESAC;
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*/
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/*
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(* ROL instruction operation *)
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WHILE (tempCOUNT ≠ 0)
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DO
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tempCF ← MSB(DEST);
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DEST ← (DEST * 2) + tempCF;
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tempCOUNT ← tempCOUNT – 1;
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OD;
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ELIHW;
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IF COUNT = 1
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THEN OF ← MSB(DEST) XOR CF;
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ELSE OF is undefined;
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FI;
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*/
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/*
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The CF flag contains the value of the bit shifted into it.
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The OF flag is affected only for single- bit rotates (see “Description” above);
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it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected.
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*/
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const auto temp_count = count & (Numeric::bit_size<IntT>() - 1);
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if(!count) {
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// TODO: is this 8086-specific? i.e. do the other x86s also exit without affecting flags when temp_count = 0?
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return;
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}
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if(temp_count) {
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destination =
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(destination << temp_count) |
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(destination >> (Numeric::bit_size<IntT>() - temp_count));
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}
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context.flags.template set_from<Flag::Carry>(destination & 1);
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context.flags.template set_from<Flag::Overflow>(
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((destination >> (Numeric::bit_size<IntT>() - 1)) ^ destination) & 1
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);
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}
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template <typename IntT, typename ContextT>
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void ror(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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/*
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(* ROL and ROR instructions *)
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SIZE ← OperandSize
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CASE (determine count) OF
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SIZE = 8: tempCOUNT ← COUNT MOD 8;
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SIZE = 16: tempCOUNT ← COUNT MOD 16;
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SIZE = 32: tempCOUNT ← COUNT MOD 32;
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ESAC;
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*/
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/*
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(* ROR instruction operation *)
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WHILE (tempCOUNT ≠ 0)
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DO
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tempCF ← LSB(DEST);
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DEST ← (DEST / 2) + (tempCF * 2^SIZE);
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tempCOUNT ← tempCOUNT – 1;
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OD;
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ELIHW;
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IF COUNT = 1
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THEN OF ← MSB(DEST) XOR MSB - 1 (DEST);
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ELSE OF is undefined;
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FI;
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*/
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/*
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The CF flag contains the value of the bit shifted into it.
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The OF flag is affected only for single- bit rotates (see “Description” above);
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it is undefined for multi-bit rotates. The SF, ZF, AF, and PF flags are not affected.
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*/
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const auto temp_count = count & (Numeric::bit_size<IntT>() - 1);
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if(!count) {
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// TODO: is this 8086-specific? i.e. do the other x86s also exit without affecting flags when temp_count = 0?
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return;
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}
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if(temp_count) {
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destination =
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(destination >> temp_count) |
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(destination << (Numeric::bit_size<IntT>() - temp_count));
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}
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context.flags.template set_from<Flag::Carry>(destination & Numeric::top_bit<IntT>());
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context.flags.template set_from<Flag::Overflow>(
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(destination ^ (destination << 1)) & Numeric::top_bit<IntT>()
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);
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}
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/*
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tempCOUNT ← (COUNT AND 1FH);
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tempDEST ← DEST;
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WHILE (tempCOUNT ≠ 0)
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DO
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IF instruction is SAL or SHL
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THEN
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CF ← MSB(DEST);
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ELSE (* instruction is SAR or SHR *)
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CF ← LSB(DEST);
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FI;
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IF instruction is SAL or SHL
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THEN
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DEST ← DEST ∗ 2;
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ELSE
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IF instruction is SAR
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THEN
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DEST ← DEST / 2 (*Signed divide, rounding toward negative infinity*);
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ELSE (* instruction is SHR *)
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DEST ← DEST / 2 ; (* Unsigned divide *);
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FI;
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FI;
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tempCOUNT ← tempCOUNT – 1;
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OD;
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(* Determine overflow for the various instructions *)
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IF COUNT = 1
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THEN
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IF instruction is SAL or SHL
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THEN
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OF ← MSB(DEST) XOR CF;
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ELSE
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IF instruction is SAR
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THEN
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OF ← 0;
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ELSE (* instruction is SHR *)
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OF ← MSB(tempDEST);
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FI;
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FI;
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ELSE
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IF COUNT = 0
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THEN
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All flags remain unchanged;
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ELSE (* COUNT neither 1 or 0 *)
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OF ← undefined;
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FI;
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FI;
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*/
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/*
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The CF flag contains the value of the last bit shifted out of the destination operand;
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it is undefined for SHL and SHR instructions where the count is greater than or equal to
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the size (in bits) of the destination operand. The OF flag is affected only for 1-bit shifts
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(see “Description” above); otherwise, it is undefined.
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The SF, ZF, and PF flags are set according to the result. If the count is 0, the flags are not affected.
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For a non-zero count, the AF flag is undefined.
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*/
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template <typename IntT, typename ContextT>
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void sal(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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switch(count) {
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case 0: return;
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case Numeric::bit_size<IntT>():
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context.flags.template set_from<Flag::Carry, Flag::Overflow>(destination & 1);
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destination = 0;
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break;
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default:
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if(count > Numeric::bit_size<IntT>()) {
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context.flags.template set_from<Flag::Carry, Flag::Overflow>(0);
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destination = 0;
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} else {
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const auto mask = (Numeric::top_bit<IntT>() >> (count - 1));
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context.flags.template set_from<Flag::Carry>(
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destination & mask
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);
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context.flags.template set_from<Flag::Overflow>(
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(destination ^ (destination << 1)) & mask
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);
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destination <<= count;
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}
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break;
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}
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context.flags.template set_from<IntT, Flag::Sign, Flag::Zero, Flag::ParityOdd>(destination);
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}
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template <typename IntT, typename ContextT>
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void sar(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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if(!count) {
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return;
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}
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const IntT sign = Numeric::top_bit<IntT>() & destination;
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if(count >= Numeric::bit_size<IntT>()) {
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destination = sign ? IntT(~0) : IntT(0);
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context.flags.template set_from<Flag::Carry>(sign);
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} else {
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const IntT mask = 1 << (count - 1);
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context.flags.template set_from<Flag::Carry>(destination & mask);
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destination = (destination >> count) | (sign ? ~(IntT(~0) >> count) : 0);
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}
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context.flags.template set_from<Flag::Overflow>(0);
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context.flags.template set_from<IntT, Flag::Sign, Flag::Zero, Flag::ParityOdd>(destination);
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}
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template <typename IntT, typename ContextT>
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void shr(
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modify_t<IntT> destination,
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uint8_t count,
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ContextT &context
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) {
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if(!count) {
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return;
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}
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context.flags.template set_from<Flag::Overflow>(Numeric::top_bit<IntT>() & destination);
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if(count == Numeric::bit_size<IntT>()) {
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context.flags.template set_from<Flag::Carry>(Numeric::top_bit<IntT>() & destination);
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destination = 0;
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} else if(count > Numeric::bit_size<IntT>()) {
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context.flags.template set_from<Flag::Carry>(0);
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destination = 0;
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} else {
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const IntT mask = 1 << (count - 1);
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context.flags.template set_from<Flag::Carry>(destination & mask);
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destination >>= count;
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}
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context.flags.template set_from<IntT, Flag::Sign, Flag::Zero, Flag::ParityOdd>(destination);
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}
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}
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|||
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#endif /* ShiftRoll_hpp */
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