2021-06-15 00:55:39 +00:00
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//
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// Enterprise.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 10/06/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#include "Enterprise.hpp"
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2021-06-22 23:33:41 +00:00
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#include "Dave.hpp"
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#include "EXDos.hpp"
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2021-06-18 00:47:56 +00:00
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#include "Keyboard.hpp"
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2021-06-15 02:19:25 +00:00
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#include "Nick.hpp"
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2021-06-15 01:02:40 +00:00
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#include "../MachineTypes.hpp"
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2021-06-15 00:55:39 +00:00
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#include "../../Analyser/Static/Enterprise/Target.hpp"
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2021-06-15 02:19:25 +00:00
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#include "../../ClockReceiver/JustInTime.hpp"
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2021-06-25 02:21:01 +00:00
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#include "../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp"
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#include "../../Processors/Z80/Z80.hpp"
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2021-06-15 01:11:06 +00:00
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2021-06-15 00:55:39 +00:00
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namespace Enterprise {
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2021-06-15 02:56:26 +00:00
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/*
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Notes to self on timing:
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Nick divides each line into 57 windows; each window lasts 16 cycles and dedicates the
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first 10 of those to VRAM accesses, leaving the final six for a Z80 video RAM access
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if one has been requested.
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The Z80 has a separate, asynchronous 4Mhz clock. That's that.
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The documentation is also very forward in emphasising that Nick generates phaselocked
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(i.e. in-phase) PAL video.
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So: 57*16 = 912 cycles/line.
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A standard PAL line lasts 64µs and during that time outputs 283.7516 colour cycles.
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I shall _guess_ that the Enterprise stretches each line to 284 colour cycles rather than
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reducing it to 283.
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2021-06-20 18:21:56 +00:00
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Therefore 912 cycles occurs in 284/283.7516 * 64 µs.
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2021-06-15 02:56:26 +00:00
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2021-06-20 18:21:56 +00:00
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So one line = 181760000 / 2837516 µs = 45440000 / 709379 µs
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=> one cycle = 45440000 / 709379*912 = 45440000 / 646953648 = 2840000 / 40434603 µs
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=> clock rate of 40434603 / 2840000 Mhz
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2021-06-15 02:56:26 +00:00
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2021-06-20 18:25:37 +00:00
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And, therefore, the ratio to a 4Mhz Z80 clock is:
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40434603 / (2840000 * 4)
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= 40434603 / 11360000
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i.e. roughly 3.55 Nick cycles per Z80 cycle.
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2021-06-15 02:56:26 +00:00
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If that's true then the 6-cycle window is around 1.69 Z80 cycles long. Given that the Z80
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clock in an Enterprise can be stopped in half-cycle increments only, the Z80 can only be
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guaranteed to have around a 1.19 cycle minimum for its actual access. I'm therefore further
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postulating that the clock stoppage takes place so as to align the final cycle of a relevant
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access over the available window.
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*/
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2021-06-21 00:30:54 +00:00
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template <bool has_disk_controller> class ConcreteMachine:
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2021-06-15 01:11:06 +00:00
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public CPU::Z80::BusHandler,
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2021-06-15 01:02:40 +00:00
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public Machine,
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2021-06-25 02:21:01 +00:00
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public MachineTypes::AudioProducer,
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2021-06-18 00:47:56 +00:00
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public MachineTypes::MappedKeyboardMachine,
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2021-06-21 02:30:27 +00:00
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public MachineTypes::MediaTarget,
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2021-06-15 01:02:40 +00:00
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public MachineTypes::ScanProducer,
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public MachineTypes::TimedMachine {
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2021-06-23 01:48:55 +00:00
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private:
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constexpr uint8_t min_ram_slot(const Analyser::Static::Enterprise::Target &target) {
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size_t ram_size = 128*1024;
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switch(target.model) {
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case Analyser::Static::Enterprise::Target::Model::Enterprise64: ram_size = 64*1024; break;
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case Analyser::Static::Enterprise::Target::Model::Enterprise128: ram_size = 128*1024; break;
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case Analyser::Static::Enterprise::Target::Model::Enterprise256: ram_size = 256*1024; break;
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}
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return uint8_t(0x100 - ram_size / 0x4000);
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}
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2021-06-15 00:55:39 +00:00
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public:
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2021-06-15 01:29:56 +00:00
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ConcreteMachine([[maybe_unused]] const Analyser::Static::Enterprise::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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2021-06-23 01:48:55 +00:00
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min_ram_slot_(min_ram_slot(target)),
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2021-06-15 21:43:13 +00:00
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z80_(*this),
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2021-06-25 02:21:01 +00:00
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nick_(ram_.end() - 65536),
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dave_(audio_queue_),
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speaker_(dave_) {
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2021-06-15 01:02:40 +00:00
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// Request a clock of 4Mhz; this'll be mapped upwards for Nick and Dave elsewhere.
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set_clock_rate(4'000'000);
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2021-06-20 02:59:09 +00:00
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ROM::Request request;
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using Target = Analyser::Static::Enterprise::Target;
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// Pick one or more EXOS ROMs.
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switch(target.exos_version) {
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case Target::EXOSVersion::v10: request = request && ROM::Request(ROM::Name::EnterpriseEXOS10); break;
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case Target::EXOSVersion::v20: request = request && ROM::Request(ROM::Name::EnterpriseEXOS20); break;
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case Target::EXOSVersion::v21: request = request && ROM::Request(ROM::Name::EnterpriseEXOS21); break;
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case Target::EXOSVersion::v23: request = request && ROM::Request(ROM::Name::EnterpriseEXOS23); break;
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case Target::EXOSVersion::Any:
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request =
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request && (
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ROM::Request(ROM::Name::EnterpriseEXOS10) || ROM::Request(ROM::Name::EnterpriseEXOS20) ||
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ROM::Request(ROM::Name::EnterpriseEXOS21) || ROM::Request(ROM::Name::EnterpriseEXOS23)
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);
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break;
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default: break;
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}
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// Similarly pick one or more BASIC ROMs.
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switch(target.basic_version) {
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case Target::BASICVersion::v10:
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request = request && (
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ROM::Request(ROM::Name::EnterpriseBASIC10) ||
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(ROM::Request(ROM::Name::EnterpriseBASIC10Part1) && ROM::Request(ROM::Name::EnterpriseBASIC10Part2))
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);
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break;
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case Target::BASICVersion::v11:
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request = request && (
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ROM::Request(ROM::Name::EnterpriseBASIC11) ||
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ROM::Request(ROM::Name::EnterpriseBASIC11Suffixed)
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);
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case Target::BASICVersion::v21:
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request = request && ROM::Request(ROM::Name::EnterpriseBASIC21);
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break;
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case Target::BASICVersion::Any:
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request =
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request && (
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ROM::Request(ROM::Name::EnterpriseBASIC10) ||
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(ROM::Request(ROM::Name::EnterpriseBASIC10Part1) && ROM::Request(ROM::Name::EnterpriseBASIC10Part2)) ||
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ROM::Request(ROM::Name::EnterpriseBASIC11) ||
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ROM::Request(ROM::Name::EnterpriseBASIC21)
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);
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break;
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default: break;
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}
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2021-06-21 00:30:54 +00:00
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// Possibly add in a DOS.
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switch(target.dos) {
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2021-06-23 23:32:34 +00:00
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case Target::DOS::EXDOS: request = request && ROM::Request(ROM::Name::EnterpriseEXDOS); break;
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2021-06-21 00:30:54 +00:00
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default: break;
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}
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2021-06-20 02:59:09 +00:00
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// Get and validate ROMs.
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2021-06-15 01:17:09 +00:00
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auto roms = rom_fetcher(request);
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if(!request.validate(roms)) {
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throw ROMMachine::Error::MissingROMs;
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}
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2021-06-20 02:59:09 +00:00
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// Extract the appropriate EXOS ROM.
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2021-06-17 02:25:00 +00:00
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exos_.fill(0xff);
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2021-06-20 02:59:09 +00:00
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for(const auto rom_name: { ROM::Name::EnterpriseEXOS10, ROM::Name::EnterpriseEXOS20, ROM::Name::EnterpriseEXOS21, ROM::Name::EnterpriseEXOS23 }) {
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const auto exos = roms.find(rom_name);
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if(exos != roms.end()) {
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memcpy(exos_.data(), exos->second.data(), std::min(exos_.size(), exos->second.size()));
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break;
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}
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}
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// Extract the appropriate BASIC ROM[s] (if any).
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basic_.fill(0xff);
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bool has_basic = false;
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for(const auto rom_name: { ROM::Name::EnterpriseBASIC10, ROM::Name::EnterpriseBASIC11, ROM::Name::EnterpriseBASIC11Suffixed, ROM::Name::EnterpriseBASIC21 }) {
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const auto basic = roms.find(rom_name);
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if(basic != roms.end()) {
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memcpy(basic_.data(), basic->second.data(), std::min(basic_.size(), basic->second.size()));
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has_basic = true;
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break;
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}
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}
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if(!has_basic) {
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const auto basic1 = roms.find(ROM::Name::EnterpriseBASIC10Part1);
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const auto basic2 = roms.find(ROM::Name::EnterpriseBASIC10Part2);
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if(basic1 != roms.end() && basic2 != roms.end()) {
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memcpy(&basic_[0x0000], basic1->second.data(), std::min(size_t(8192), basic1->second.size()));
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memcpy(&basic_[0x2000], basic2->second.data(), std::min(size_t(8192), basic2->second.size()));
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}
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}
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2021-06-15 01:40:19 +00:00
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2021-06-23 23:32:34 +00:00
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// Extract the appropriate DOS ROMs.
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epdos_rom_.fill(0xff);
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const auto epdos = roms.find(ROM::Name::EnterpriseEPDOS);
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if(epdos != roms.end()) {
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memcpy(epdos_rom_.data(), epdos->second.data(), std::min(epdos_rom_.size(), epdos->second.size()));
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}
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exdos_rom_.fill(0xff);
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const auto exdos = roms.find(ROM::Name::EnterpriseEXDOS);
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if(exdos != roms.end()) {
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memcpy(exdos_rom_.data(), exdos->second.data(), std::min(exdos_rom_.size(), exdos->second.size()));
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2021-06-21 00:30:54 +00:00
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}
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2021-06-20 02:59:09 +00:00
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// Seed key state.
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2021-06-19 17:03:31 +00:00
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clear_all_keys();
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2021-06-15 02:19:25 +00:00
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// Take a reasonable guess at the initial memory configuration:
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// put EXOS into the first bank since this is a Z80 and therefore
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// starts from address 0; the third instruction in EXOS is a jump
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// to $c02e so it's reasonable to assume EXOS is in the highest bank
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// too, and it appears to act correctly if it's the first 16kb that's
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// in the highest bank. From there I guess: all banks are initialised
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// to 0.
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2021-06-15 01:29:56 +00:00
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page<0>(0x00);
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2021-06-15 01:40:19 +00:00
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page<1>(0x00);
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page<2>(0x00);
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page<3>(0x00);
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2021-06-21 02:30:27 +00:00
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2021-06-25 02:21:01 +00:00
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// Set up audio.
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2021-06-27 03:39:59 +00:00
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speaker_.set_input_rate(250000.0f); // TODO: a bigger number, and respect the programmable divider.
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2021-06-25 02:21:01 +00:00
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2021-06-21 02:30:27 +00:00
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// Pass on any media.
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insert_media(target.media);
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2021-06-15 01:29:56 +00:00
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}
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2021-06-25 02:21:01 +00:00
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~ConcreteMachine() {
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audio_queue_.flush();
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}
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2021-06-15 01:29:56 +00:00
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// MARK: - Z80::BusHandler.
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2021-06-27 21:24:21 +00:00
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forceinline void advance_nick(HalfCycles duration) {
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if(nick_ += duration) {
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const auto nick = nick_.last_valid();
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const bool nick_interrupt_line = nick->get_interrupt_line();
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if(nick_interrupt_line && !previous_nick_interrupt_line_) {
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set_interrupt(Interrupt::Nick, nick_.last_sequence_point_overrun());
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}
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previous_nick_interrupt_line_ = nick_interrupt_line;
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}
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}
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2021-06-15 01:29:56 +00:00
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forceinline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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using PartialMachineCycle = CPU::Z80::PartialMachineCycle;
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const uint16_t address = cycle.address ? *cycle.address : 0x0000;
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2021-06-27 20:28:01 +00:00
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// Calculate an access penalty, if applicable.
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2021-06-27 20:11:22 +00:00
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HalfCycles penalty;
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2021-06-27 20:28:01 +00:00
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switch(cycle.operation) {
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default: break;
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2021-06-27 20:11:22 +00:00
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2021-06-27 20:28:01 +00:00
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// For non-video pauses, insert during the initial part of the bus cycle.
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case CPU::Z80::PartialMachineCycle::ReadStart:
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case CPU::Z80::PartialMachineCycle::WriteStart:
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if(!is_video_[address >> 14] && wait_mode_ == WaitMode::OnAllAccesses) {
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penalty = HalfCycles(2);
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcodeStart:
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if(!is_video_[address >> 14] && wait_mode_ != WaitMode::None) {
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penalty = HalfCycles(2);
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2021-06-27 21:24:21 +00:00
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} else {
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// Query Nick for the amount of delay that would occur with one cycle left
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// in this read opcode.
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const auto delay = nick_.last_valid()->get_time_until_z80_slot(nick_.time_since_flush(HalfCycles(2)));
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penalty = nick_.back_map(delay);
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2021-06-27 20:28:01 +00:00
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}
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break;
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// Video pauses: insert right at the end of the bus cycle.
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case CPU::Z80::PartialMachineCycle::Write:
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2021-06-27 21:24:21 +00:00
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// Ensure all video that should have been collected prior to
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// this write has been.
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2021-06-27 20:28:01 +00:00
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if(is_video_[address >> 14]) {
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2021-06-27 21:24:21 +00:00
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nick_.flush();
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}
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[[fallthrough]];
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case CPU::Z80::PartialMachineCycle::Read:
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if(is_video_[address >> 14]) {
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// Get delay, in Nick cycles, for a Z80 access that occurs in 0.5
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// cycles from now (i.e. with one cycle left to run).
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const auto delay = nick_.last_valid()->get_time_until_z80_slot(nick_.time_since_flush(HalfCycles(1)));
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penalty = nick_.back_map(delay);
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2021-06-27 20:28:01 +00:00
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}
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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case CPU::Z80::PartialMachineCycle::Output: {
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if((address & 0xf0) == 0x80) {
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2021-06-27 21:24:21 +00:00
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// Get delay, in Nick cycles, for a Z80 access that occurs in 0.5
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// cycles from now (i.e. with one cycle left to run).
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const auto delay = nick_.last_valid()->get_time_until_z80_slot(nick_.time_since_flush(HalfCycles(1)));
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penalty = nick_.back_map(delay);
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2021-06-27 20:28:01 +00:00
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}
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2021-06-27 20:11:22 +00:00
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}
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}
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2021-06-18 02:30:24 +00:00
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2021-06-27 20:11:22 +00:00
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const HalfCycles full_length = cycle.length + penalty;
|
|
|
|
time_since_audio_update_ += full_length;
|
2021-06-27 21:24:21 +00:00
|
|
|
advance_nick(full_length);
|
2021-06-15 01:29:56 +00:00
|
|
|
|
2021-06-21 00:50:23 +00:00
|
|
|
// The WD/etc runs at a nominal 8Mhz.
|
|
|
|
if constexpr (has_disk_controller) {
|
2021-06-27 20:11:22 +00:00
|
|
|
exdos_.run_for(Cycles(full_length.as_integral()));
|
2021-06-21 00:50:23 +00:00
|
|
|
}
|
|
|
|
|
2021-06-15 01:29:56 +00:00
|
|
|
switch(cycle.operation) {
|
|
|
|
default: break;
|
|
|
|
|
|
|
|
case CPU::Z80::PartialMachineCycle::Input:
|
2021-06-15 01:45:12 +00:00
|
|
|
switch(address & 0xff) {
|
|
|
|
default:
|
|
|
|
printf("Unhandled input: %04x\n", address);
|
2021-06-22 10:15:42 +00:00
|
|
|
// assert(false);
|
|
|
|
*cycle.value = 0xff;
|
2021-06-15 01:45:12 +00:00
|
|
|
break;
|
|
|
|
|
2021-06-21 00:50:23 +00:00
|
|
|
case 0x10: case 0x11: case 0x12: case 0x13:
|
|
|
|
case 0x14: case 0x15: case 0x16: case 0x17:
|
|
|
|
*cycle.value = exdos_.read(address);
|
|
|
|
break;
|
|
|
|
case 0x18: case 0x19: case 0x1a: case 0x1b:
|
|
|
|
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
|
|
|
|
*cycle.value = exdos_.get_control_register();
|
|
|
|
break;
|
|
|
|
|
2021-06-15 01:45:12 +00:00
|
|
|
case 0xb0: *cycle.value = pages_[0]; break;
|
|
|
|
case 0xb1: *cycle.value = pages_[1]; break;
|
|
|
|
case 0xb2: *cycle.value = pages_[2]; break;
|
|
|
|
case 0xb3: *cycle.value = pages_[3]; break;
|
2021-06-15 02:28:31 +00:00
|
|
|
|
|
|
|
case 0xb4:
|
2021-06-19 02:59:41 +00:00
|
|
|
*cycle.value = interrupt_mask_ | interrupt_state_;
|
2021-06-15 02:28:31 +00:00
|
|
|
break;
|
|
|
|
case 0xb5:
|
2021-06-18 00:47:56 +00:00
|
|
|
if(active_key_line_ < key_lines_.size()) {
|
|
|
|
*cycle.value = key_lines_[active_key_line_];
|
|
|
|
} else {
|
|
|
|
*cycle.value = 0xff;
|
|
|
|
}
|
2021-06-15 02:28:31 +00:00
|
|
|
break;
|
2021-06-22 23:33:41 +00:00
|
|
|
case 0xb6:
|
|
|
|
// TODO: joystick input.
|
|
|
|
*cycle.value = 0xff;
|
|
|
|
break;
|
2021-06-15 01:45:12 +00:00
|
|
|
}
|
2021-06-15 01:40:19 +00:00
|
|
|
break;
|
|
|
|
|
2021-06-15 01:29:56 +00:00
|
|
|
case CPU::Z80::PartialMachineCycle::Output:
|
2021-06-15 01:45:12 +00:00
|
|
|
switch(address & 0xff) {
|
|
|
|
default:
|
|
|
|
printf("Unhandled output: %04x\n", address);
|
2021-06-22 10:15:42 +00:00
|
|
|
// assert(false);
|
2021-06-15 01:45:12 +00:00
|
|
|
break;
|
|
|
|
|
2021-06-21 00:50:23 +00:00
|
|
|
case 0x10: case 0x11: case 0x12: case 0x13:
|
|
|
|
case 0x14: case 0x15: case 0x16: case 0x17:
|
|
|
|
exdos_.write(address, *cycle.value);
|
|
|
|
break;
|
|
|
|
case 0x18: case 0x19: case 0x1a: case 0x1b:
|
|
|
|
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
|
|
|
|
exdos_.set_control_register(*cycle.value);
|
|
|
|
break;
|
|
|
|
|
2021-06-15 02:19:25 +00:00
|
|
|
case 0x80: case 0x81: case 0x82: case 0x83:
|
|
|
|
case 0x84: case 0x85: case 0x86: case 0x87:
|
|
|
|
case 0x88: case 0x89: case 0x8a: case 0x8b:
|
|
|
|
case 0x8c: case 0x8d: case 0x8e: case 0x8f:
|
|
|
|
nick_->write(address, *cycle.value);
|
|
|
|
break;
|
|
|
|
|
2021-06-15 01:45:12 +00:00
|
|
|
case 0xb0: page<0>(*cycle.value); break;
|
|
|
|
case 0xb1: page<1>(*cycle.value); break;
|
|
|
|
case 0xb2: page<2>(*cycle.value); break;
|
|
|
|
case 0xb3: page<3>(*cycle.value); break;
|
|
|
|
|
2021-06-15 02:28:31 +00:00
|
|
|
case 0xa0: case 0xa1: case 0xa2: case 0xa3:
|
|
|
|
case 0xa4: case 0xa5: case 0xa6: case 0xa7:
|
|
|
|
case 0xa8: case 0xa9: case 0xaa: case 0xab:
|
|
|
|
case 0xac: case 0xad: case 0xae: case 0xaf:
|
2021-06-25 02:21:01 +00:00
|
|
|
update_audio();
|
2021-06-22 23:33:41 +00:00
|
|
|
dave_.write(address, *cycle.value);
|
2021-06-15 02:28:31 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xb4:
|
2021-06-19 02:59:41 +00:00
|
|
|
interrupt_mask_ = *cycle.value & 0x55;
|
|
|
|
interrupt_state_ &= ~*cycle.value;
|
|
|
|
update_interrupts();
|
2021-06-25 02:21:01 +00:00
|
|
|
|
|
|
|
if(interrupt_mask_ & 0x45) {
|
|
|
|
printf("Unimplemented interrupts requested: %02x\n", interrupt_mask_ & 0x45);
|
|
|
|
}
|
2021-06-15 02:28:31 +00:00
|
|
|
break;
|
|
|
|
case 0xb5:
|
2021-06-18 00:47:56 +00:00
|
|
|
active_key_line_ = *cycle.value & 0xf;
|
|
|
|
// TODO: printer strobe, type sound, REM switches.
|
2021-06-15 02:28:31 +00:00
|
|
|
break;
|
|
|
|
case 0xb6:
|
|
|
|
printf("TODO: printer output %02x\n", *cycle.value);
|
|
|
|
break;
|
2021-06-15 01:45:12 +00:00
|
|
|
case 0xbf:
|
|
|
|
printf("TODO: Dave sysconfig %02x\n", *cycle.value);
|
2021-06-27 20:11:22 +00:00
|
|
|
switch((*cycle.value >> 2)&3) {
|
|
|
|
default: wait_mode_ = WaitMode::None; break;
|
|
|
|
case 0: wait_mode_ = WaitMode::OnAllAccesses; break;
|
|
|
|
case 1: wait_mode_ = WaitMode::OnM1; break;
|
|
|
|
}
|
2021-06-15 01:45:12 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-06-15 01:29:56 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case CPU::Z80::PartialMachineCycle::Read:
|
|
|
|
case CPU::Z80::PartialMachineCycle::ReadOpcode:
|
|
|
|
if(read_pointers_[address >> 14]) {
|
|
|
|
*cycle.value = read_pointers_[address >> 14][address];
|
|
|
|
} else {
|
|
|
|
*cycle.value = 0xff;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CPU::Z80::PartialMachineCycle::Write:
|
|
|
|
if(write_pointers_[address >> 14]) {
|
|
|
|
write_pointers_[address >> 14][address] = *cycle.value;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2021-06-27 20:11:22 +00:00
|
|
|
return penalty;
|
2021-06-15 00:55:39 +00:00
|
|
|
}
|
2021-06-15 01:02:40 +00:00
|
|
|
|
2021-06-15 02:19:25 +00:00
|
|
|
void flush() {
|
|
|
|
nick_.flush();
|
2021-06-25 02:21:01 +00:00
|
|
|
update_audio();
|
|
|
|
audio_queue_.perform();
|
|
|
|
}
|
|
|
|
|
|
|
|
inline void update_audio() {
|
2021-06-27 03:39:59 +00:00
|
|
|
// TODO: divide by only 8, letting Dave divide itself by a further 2 or 3
|
|
|
|
// as per its own register.
|
|
|
|
speaker_.run_for(audio_queue_, time_since_audio_update_.divide_cycles(Cycles(16)));
|
2021-06-15 02:19:25 +00:00
|
|
|
}
|
|
|
|
|
2021-06-15 01:02:40 +00:00
|
|
|
private:
|
2021-06-15 02:19:25 +00:00
|
|
|
// MARK: - Memory layout
|
2021-06-25 02:21:01 +00:00
|
|
|
std::array<uint8_t, 256 * 1024> ram_{};
|
2021-06-17 02:25:00 +00:00
|
|
|
std::array<uint8_t, 64 * 1024> exos_;
|
2021-06-20 02:59:09 +00:00
|
|
|
std::array<uint8_t, 16 * 1024> basic_;
|
2021-06-23 23:32:34 +00:00
|
|
|
std::array<uint8_t, 16 * 1024> exdos_rom_;
|
|
|
|
std::array<uint8_t, 32 * 1024> epdos_rom_;
|
2021-06-23 01:48:55 +00:00
|
|
|
const uint8_t min_ram_slot_;
|
2021-06-15 01:17:09 +00:00
|
|
|
|
2021-06-15 02:19:25 +00:00
|
|
|
const uint8_t *read_pointers_[4] = {nullptr, nullptr, nullptr, nullptr};
|
|
|
|
uint8_t *write_pointers_[4] = {nullptr, nullptr, nullptr, nullptr};
|
|
|
|
uint8_t pages_[4] = {0x80, 0x80, 0x80, 0x80};
|
2021-06-15 01:29:56 +00:00
|
|
|
|
|
|
|
template <size_t slot> void page(uint8_t offset) {
|
|
|
|
pages_[slot] = offset;
|
|
|
|
|
2021-06-23 23:32:34 +00:00
|
|
|
#define Map(location, source) \
|
|
|
|
if(offset >= location && offset < location + source.size() / 0x4000) { \
|
|
|
|
page<slot>(&source[(offset - location) * 0x4000], nullptr); \
|
2021-06-27 20:11:22 +00:00
|
|
|
is_video_[slot] = false; \
|
2021-06-23 23:32:34 +00:00
|
|
|
return; \
|
|
|
|
}
|
2021-06-15 01:29:56 +00:00
|
|
|
|
2021-06-23 23:32:34 +00:00
|
|
|
Map(0, exos_);
|
|
|
|
Map(16, basic_);
|
|
|
|
Map(32, exdos_rom_);
|
|
|
|
Map(48, epdos_rom_);
|
2021-06-20 02:59:09 +00:00
|
|
|
|
2021-06-23 23:32:34 +00:00
|
|
|
#undef Map
|
2021-06-21 00:30:54 +00:00
|
|
|
|
2021-06-15 21:44:39 +00:00
|
|
|
// Of whatever size of RAM I've declared above, use only the final portion.
|
|
|
|
// This correlated with Nick always having been handed the final 64kb and,
|
|
|
|
// at least while the RAM is the first thing declared above, does a little
|
|
|
|
// to benefit data locality. Albeit not in a useful sense.
|
2021-06-15 01:29:56 +00:00
|
|
|
if(offset >= min_ram_slot_) {
|
2021-06-15 21:43:13 +00:00
|
|
|
const auto ram_floor = 4194304 - ram_.size();
|
|
|
|
const size_t address = offset * 0x4000 - ram_floor;
|
2021-06-27 20:11:22 +00:00
|
|
|
is_video_[slot] = offset >= 0xfc; // TODO: this hard-codes a 64kb video assumption.
|
2021-06-15 01:29:56 +00:00
|
|
|
page<slot>(&ram_[address], &ram_[address]);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
page<slot>(nullptr, nullptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
template <size_t slot> void page(const uint8_t *read, uint8_t *write) {
|
|
|
|
read_pointers_[slot] = read ? read - (slot * 0x4000) : nullptr;
|
|
|
|
write_pointers_[slot] = write ? write - (slot * 0x4000) : nullptr;
|
2021-06-15 01:11:06 +00:00
|
|
|
}
|
|
|
|
|
2021-06-27 20:11:22 +00:00
|
|
|
// MARK: - Memory Timing
|
|
|
|
|
|
|
|
// The wait mode affects all memory accesses _outside of the video area_.
|
|
|
|
enum class WaitMode {
|
|
|
|
None,
|
|
|
|
OnM1,
|
|
|
|
OnAllAccesses
|
|
|
|
} wait_mode_ = WaitMode::None;
|
|
|
|
bool is_video_[4]{};
|
|
|
|
|
2021-06-15 01:02:40 +00:00
|
|
|
// MARK: - ScanProducer
|
|
|
|
void set_scan_target(Outputs::Display::ScanTarget *scan_target) override {
|
2021-06-15 03:11:48 +00:00
|
|
|
nick_.last_valid()->set_scan_target(scan_target);
|
2021-06-15 01:02:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
Outputs::Display::ScanStatus get_scaled_scan_status() const override {
|
2021-06-15 03:11:48 +00:00
|
|
|
return nick_.last_valid()->get_scaled_scan_status();
|
2021-06-15 01:02:40 +00:00
|
|
|
}
|
|
|
|
|
2021-06-25 02:21:01 +00:00
|
|
|
// MARK: - AudioProducer
|
|
|
|
|
|
|
|
Outputs::Speaker::Speaker *get_speaker() final {
|
|
|
|
return &speaker_;
|
|
|
|
}
|
|
|
|
|
2021-06-15 01:02:40 +00:00
|
|
|
// MARK: - TimedMachine
|
|
|
|
void run_for(const Cycles cycles) override {
|
2021-06-15 01:29:56 +00:00
|
|
|
z80_.run_for(cycles);
|
2021-06-15 01:02:40 +00:00
|
|
|
}
|
2021-06-15 02:19:25 +00:00
|
|
|
|
2021-06-18 00:47:56 +00:00
|
|
|
// MARK: - KeyboardMachine
|
|
|
|
Enterprise::KeyboardMapper keyboard_mapper_;
|
|
|
|
KeyboardMapper *get_keyboard_mapper() final {
|
|
|
|
return &keyboard_mapper_;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t active_key_line_ = 0;
|
|
|
|
std::array<uint8_t, 10> key_lines_;
|
|
|
|
void set_key_state(uint16_t key, bool is_pressed) final {
|
|
|
|
if(is_pressed) {
|
|
|
|
key_lines_[key >> 8] &= ~uint8_t(key);
|
|
|
|
} else {
|
|
|
|
key_lines_[key >> 8] |= uint8_t(key);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void clear_all_keys() final {
|
|
|
|
key_lines_.fill(0xff);
|
|
|
|
}
|
|
|
|
|
2021-06-21 02:30:27 +00:00
|
|
|
// MARK: - MediaTarget
|
|
|
|
bool insert_media(const Analyser::Static::Media &media) final {
|
|
|
|
if constexpr (has_disk_controller) {
|
|
|
|
if(!media.disks.empty()) {
|
|
|
|
exdos_.set_disk(media.disks.front(), 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-06-19 02:59:41 +00:00
|
|
|
// MARK: - Interrupts
|
|
|
|
enum class Interrupt: uint8_t {
|
|
|
|
Nick = 0x20
|
|
|
|
};
|
|
|
|
|
|
|
|
uint8_t interrupt_mask_ = 0x00, interrupt_state_ = 0x00;
|
|
|
|
void set_interrupt(Interrupt mask, HalfCycles offset = HalfCycles(0)) {
|
|
|
|
interrupt_state_ |= uint8_t(mask);
|
|
|
|
update_interrupts(offset);
|
|
|
|
}
|
|
|
|
void update_interrupts(HalfCycles offset = HalfCycles(0)) {
|
|
|
|
z80_.set_interrupt_line((interrupt_state_ >> 1) & interrupt_mask_, offset);
|
|
|
|
}
|
|
|
|
|
2021-06-15 21:43:13 +00:00
|
|
|
// MARK: - Chips.
|
|
|
|
CPU::Z80::Processor<ConcreteMachine, false, false> z80_;
|
2021-06-20 18:25:37 +00:00
|
|
|
JustInTimeActor<Nick, HalfCycles, 40434603, 11360000> nick_;
|
2021-06-18 02:30:24 +00:00
|
|
|
bool previous_nick_interrupt_line_ = false;
|
2021-06-15 02:56:26 +00:00
|
|
|
// Cf. timing guesses above.
|
2021-06-21 00:50:23 +00:00
|
|
|
|
2021-06-25 02:21:01 +00:00
|
|
|
Concurrency::DeferringAsyncTaskQueue audio_queue_;
|
2021-06-27 18:06:49 +00:00
|
|
|
Dave::Audio dave_;
|
|
|
|
Outputs::Speaker::LowpassSpeaker<Dave::Audio> speaker_;
|
2021-06-25 02:21:01 +00:00
|
|
|
HalfCycles time_since_audio_update_;
|
2021-06-22 23:33:41 +00:00
|
|
|
|
2021-06-21 00:50:23 +00:00
|
|
|
// MARK: - EXDos card.
|
|
|
|
EXDos exdos_;
|
2021-06-15 00:55:39 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
using namespace Enterprise;
|
|
|
|
|
|
|
|
Machine *Machine::Enterprise(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) {
|
|
|
|
using Target = Analyser::Static::Enterprise::Target;
|
|
|
|
const Target *const enterprise_target = dynamic_cast<const Target *>(target);
|
|
|
|
|
2021-06-21 02:30:27 +00:00
|
|
|
if(enterprise_target->dos == Target::DOS::None)
|
2021-06-21 00:30:54 +00:00
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return new Enterprise::ConcreteMachine<false>(*enterprise_target, rom_fetcher);
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else
|
|
|
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return new Enterprise::ConcreteMachine<true>(*enterprise_target, rom_fetcher);
|
2021-06-15 00:55:39 +00:00
|
|
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}
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|
|
|
|
|
|
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Machine::~Machine() {}
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