2020-05-14 00:13:40 +00:00
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//
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// State.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 13/05/2020.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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2020-05-15 02:46:40 +00:00
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#ifndef Z80_State_hpp
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#define Z80_State_hpp
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2020-05-14 00:13:40 +00:00
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#include "../../../Reflection/Enum.hpp"
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#include "../../../Reflection/Struct.hpp"
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#include "../Z80.hpp"
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namespace CPU {
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namespace Z80 {
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/*!
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Provides a means for capturing or restoring complete Z80 state.
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This is an optional adjunct to the Z80 class. If you want to take the rest of the Z80
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implementation but don't want any of the overhead of my sort-of half-reflection as
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encapsulated in Reflection/[Enum/Struct].hpp just don't use this class.
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*/
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struct State: public Reflection::StructImpl<State> {
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/*!
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Provides the current state of the well-known, published internal registers.
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*/
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struct Registers: public Reflection::StructImpl<Registers> {
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uint8_t a;
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uint8_t flags;
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uint16_t bc, de, hl;
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2021-04-25 18:11:36 +00:00
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uint16_t af_dash, bc_dash, de_dash, hl_dash;
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2020-05-14 00:13:40 +00:00
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uint16_t ix, iy, ir;
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uint16_t program_counter, stack_pointer;
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uint16_t memptr;
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int interrupt_mode;
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bool iff1, iff2;
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Registers();
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} registers;
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/*!
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Provides the current state of the processor's various input lines that aren't
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related to an access cycle.
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*/
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struct Inputs: public Reflection::StructImpl<Inputs> {
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2020-05-14 03:58:04 +00:00
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bool irq = false;
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bool nmi = false;
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bool bus_request = false;
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bool wait = false;
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2020-05-14 00:13:40 +00:00
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Inputs();
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} inputs;
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/*!
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Contains internal state used by this particular implementation of a 6502. Most of it
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does not necessarily correlate with anything in a real 6502, and some of it very
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obviously doesn't.
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*/
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struct ExecutionState: public Reflection::StructImpl<ExecutionState> {
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2021-04-25 03:18:00 +00:00
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bool is_halted = false;
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2020-05-14 02:04:04 +00:00
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2021-04-25 03:18:00 +00:00
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uint8_t requests = 0;
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uint8_t last_requests = 0;
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uint8_t temp8 = 0;
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uint8_t operation = 0;
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uint16_t temp16 = 0;
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unsigned int flag_adjustment_history = 0;
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uint16_t pc_increment = 1;
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uint16_t refresh_address = 0;
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2020-05-14 03:58:04 +00:00
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ReflectableEnum(Phase,
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UntakenConditionalCall, Reset, IRQMode0, IRQMode1, IRQMode2,
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NMI, FetchDecode, Operation
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);
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2021-04-25 03:18:00 +00:00
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Phase phase = Phase::FetchDecode;
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int half_cycles_into_step = 0;
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int steps_into_phase = 0;
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2020-05-14 03:58:04 +00:00
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uint16_t instruction_page = 0;
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2020-05-14 00:13:40 +00:00
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ExecutionState();
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} execution_state;
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/// Default constructor; makes no guarantees as to field values beyond those given above.
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State();
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/// Instantiates a new State based on the processor @c src.
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State(const ProcessorBase &src);
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/// Applies this state to @c target.
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void apply(ProcessorBase &target);
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};
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}
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}
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2020-05-15 02:46:40 +00:00
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#endif /* Z80_State_hpp */
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