2020-12-31 03:55:59 +00:00
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//
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2021-01-15 23:16:01 +00:00
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// Instruction.hpp
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2020-12-31 03:55:59 +00:00
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// Clock Signal
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//
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2021-01-17 03:09:19 +00:00
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// Created by Thomas Harte on 15/01/21.
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2021-01-15 23:16:01 +00:00
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// Copyright © 2021 Thomas Harte. All rights reserved.
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2020-12-31 03:55:59 +00:00
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//
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2021-01-15 23:16:01 +00:00
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#ifndef InstructionSets_PowerPC_Instruction_h
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#define InstructionSets_PowerPC_Instruction_h
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2020-12-31 03:55:59 +00:00
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#include <cstdint>
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2021-01-16 02:30:30 +00:00
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namespace InstructionSet {
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2020-12-31 03:55:59 +00:00
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namespace PowerPC {
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2022-03-21 14:17:55 +00:00
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enum class CacheLine: uint32_t {
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Instruction = 0b01100,
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Data = 0b1101,
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Minimum = 0b01110,
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Maximum = 0b01111,
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};
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2022-04-02 23:58:21 +00:00
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/// Provides the meaning of individual bits within the condition register;
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/// bits are counted in IBM/Motorola order, so *bit 0 is the most significant.*
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2022-03-25 00:44:03 +00:00
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enum class Condition: uint32_t {
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// CR0
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Negative = 0, // LT
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Positive = 1, // GT
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Zero = 2, // EQ
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SummaryOverflow = 3, // SO
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// CR1
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FPException = 4, // FX
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FPEnabledException = 5, // FEX
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FPInvalidException = 6, // VX
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FPOverflowException = 7, // OX
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// CRs2–7 fill out the condition register.
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};
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2022-03-25 12:41:57 +00:00
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enum class BranchOption: uint32_t {
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2022-03-21 14:19:30 +00:00
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// Naming convention:
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//
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// Dec_ prefix => decrement the CTR;
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// condition starting NotZero or Zero => test CTR;
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2022-04-01 22:30:48 +00:00
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// condition ending Set or Clear => test the condition bit.
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2022-03-25 00:44:03 +00:00
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Dec_NotZeroAndClear = 0b0000,
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Dec_ZeroAndClear = 0b0001,
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Clear = 0b0010,
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Dec_NotZeroAndSet = 0b0100,
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Dec_ZeroAndSet = 0b0101,
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Set = 0b0110,
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Dec_NotZero = 0b1000,
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Dec_Zero = 0b1001,
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Always = 0b1010,
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2022-03-21 14:19:30 +00:00
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};
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2022-04-04 00:33:32 +00:00
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/// @returns @c 0 if reg == 0; @c ~0 otherwise.
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/// @discussion Provides a branchless way to substitute the value 0 for the value of r0
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2022-04-04 00:37:09 +00:00
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/// in affected instructions. Assumes arithmetic shifts.
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2022-04-04 00:33:32 +00:00
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template <typename IntT> constexpr IntT is_zero_mask(uint32_t reg) {
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2022-04-04 00:37:09 +00:00
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return ~IntT((int(reg) - 1) >> 5);
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2022-04-04 00:33:32 +00:00
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}
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2020-12-31 03:55:59 +00:00
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enum class Operation: uint8_t {
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Undefined,
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2022-03-27 12:47:01 +00:00
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//
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2022-03-27 22:44:56 +00:00
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// MARK: - 601-exclusive instructions.
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2022-03-27 12:47:01 +00:00
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//
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2022-03-27 22:44:56 +00:00
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// A lot of them are carry-overs from POWER, left in place
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// due to the tight original development timeline.
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//
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// These are not part of the PowerPC architecture.
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2022-03-21 14:17:55 +00:00
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2022-03-27 22:44:56 +00:00
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/// Absolute.
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2022-03-30 00:48:43 +00:00
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/// abs abs. abso abso.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA() [oe(), rc()]
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2022-03-21 14:17:55 +00:00
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absx,
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2022-03-27 22:44:56 +00:00
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/// Cache line compute size.
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/// clcs
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2022-03-31 00:36:46 +00:00
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/// rD(), rA()
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2022-03-21 14:17:55 +00:00
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clcs,
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2022-03-27 22:44:56 +00:00
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/// Divide short.
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2022-03-30 00:48:43 +00:00
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/// divs divs. divso divso.
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2022-04-01 21:11:57 +00:00
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/// rD(), rA(), rB() [rc(), eo()]
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2022-03-21 14:49:01 +00:00
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divsx,
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2022-04-09 14:20:03 +00:00
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/// Divide.
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/// div div. divo divo.
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2022-04-01 21:11:57 +00:00
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/// rD(), rA(), rB() [rc(), oe()]
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2022-04-09 14:20:03 +00:00
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divx,
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2022-03-21 14:49:01 +00:00
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2022-03-27 22:44:56 +00:00
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/// Difference or zero immediate.
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/// dozi
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2022-04-01 21:11:57 +00:00
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/// rD(), rA(), simm()
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2022-03-21 14:49:01 +00:00
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dozi,
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2022-04-09 14:20:03 +00:00
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/// Difference or zero.
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/// doz doz. dozo dozo.
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/// rD(), rA(), rB() [rc(), oe()]
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dozx,
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2022-04-02 14:26:47 +00:00
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/// Load string and compare byte indexed.
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/// lscbx lsxbx.
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2022-04-03 22:29:40 +00:00
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/// rD(), rA(), rB() [rc()]
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2022-04-02 14:26:47 +00:00
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lscbxx,
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2022-04-03 12:06:59 +00:00
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/// Mask generate.
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/// maskg maskg.
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/// rA(), rS(), rB() [rc()]
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maskgx,
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/// Mask insert from register.
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/// maskir maskir.
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/// rA(), rS(), rB() [rc()]
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maskirx,
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2022-03-30 00:48:43 +00:00
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/// Multiply.
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/// mul mul. mulo mulo.
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/// rA(), rB(), rD()
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mulx,
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2022-04-07 00:53:44 +00:00
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/// Negative absolute.
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/// nabs nabs. nabso nabso.
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/// rD(), rA() [rc(), oe()]
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nabsx,
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/// Rotate left then mask insert.
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/// rlmi rlmi.
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/// rA(), rS(), rB(), mb(), me() [rc()]
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rlmix,
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/// Rotate right and insert bit.
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/// rrib rrib.
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/// rA(), rS(), rB() [rc()]
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rribx,
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/// Shift left extended with MQ.
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/// sleq sleq.
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/// rA(), rS(), rB() [rc()]
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sleqx,
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2022-04-09 14:20:03 +00:00
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/// Shift left extended.
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/// sle sle.
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/// rA(), rS(), rB() [rc()]
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slex,
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2022-04-07 00:53:44 +00:00
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/// Shift left immediate with MQ.
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/// sliq sliq.
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/// rA(), rS(), sh() [rc()]
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sliqx,
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/// Shift left long immediate with MQ.
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/// slliq slliq.
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/// rA(), rS(), sh() [rc()]
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slliqx,
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/// Shift left long with MQ.
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/// sllq sllq.
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/// rA(), rS(), rB() [rc()]
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sllqx,
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/// Shift left with MQ.
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/// slq slq.
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/// rA(), rS(), rB() [rc()]
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slqx,
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/// Shift right algebraic immediate with MQ.
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/// sraiq sraiq.
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/// rA(), rS(), sh() [rc()]
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sraiqx,
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/// Shift right algebraic with MQ.
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/// sraq sraq.
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/// rA(), rS(), rB() [rc()]
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sraqx,
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/// Shift right extended algebraic.
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/// srea srea.
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/// rA(), rS(), rB() [rc()]
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sreax,
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/// Shift right extended with MQ.
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/// sreq sreq.
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2022-04-07 01:09:58 +00:00
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/// rA(), rS(), rB() [rc()]
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2022-04-07 00:53:44 +00:00
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sreqx,
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2022-04-09 14:20:03 +00:00
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/// Shift right extended.
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/// sre sre.
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/// rA(), rS(), rB() [rc()]
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srex,
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2022-04-07 00:53:44 +00:00
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/// Shift right immediate with MQ.
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/// sriq sriq.
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/// rA(), rS(), sh() [rc()]
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sriqx,
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/// Shift right long immediate with MQ.
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/// srliq srliq.
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/// rA(), rS(), sh() [rc()]
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srliqx,
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/// Shift right long with MQ.
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/// srlq srlq.
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/// rA(), rS(), rB() [rc()]
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srlqx,
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/// Shidt right with MQ.
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/// srq srq.
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/// rA(), rS(), rB() [rc()]
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srqx,
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2021-01-15 23:16:01 +00:00
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2022-03-27 12:47:01 +00:00
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//
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2022-03-27 22:44:56 +00:00
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// MARK: - 32- and 64-bit PowerPC instructions.
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2022-03-27 12:47:01 +00:00
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//
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2022-04-09 22:28:51 +00:00
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/// Add.
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/// add add. addo addo.
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/// rD(), rA(), rB() [rc(), oe()]
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addx,
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2022-03-27 22:44:56 +00:00
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/// Add carrying.
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2022-03-30 00:48:43 +00:00
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/// addc addc. addco addco.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), rB() [rc(), oe()]
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2022-03-27 22:44:56 +00:00
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addcx,
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/// Add extended.
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2022-03-30 00:48:43 +00:00
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/// adde adde. addeo addeo.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), rB() [rc(), eo()]
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2022-03-27 22:44:56 +00:00
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addex,
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2022-03-27 12:47:01 +00:00
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/// Add immediate.
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2022-03-27 22:44:56 +00:00
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/// addi
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), simm()
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2022-03-27 12:47:01 +00:00
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addi,
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/// Add immediate carrying.
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2022-03-27 22:44:56 +00:00
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/// addic
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), simm()
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2022-03-27 12:47:01 +00:00
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addic,
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2022-03-27 22:44:56 +00:00
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/// Add immediate carrying and record.
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/// addic.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), simm()
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2022-03-27 12:47:01 +00:00
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addic_,
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2022-03-27 22:44:56 +00:00
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/// Add immediate shifted.
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/// addis.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA(), simm()
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2022-03-27 12:47:01 +00:00
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addis,
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2022-03-27 22:44:56 +00:00
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/// Add to minus one.
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2022-03-30 00:48:43 +00:00
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/// addme addme. addmeo addmeo.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA() [rc(), oe()]
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2022-03-27 22:44:56 +00:00
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addmex,
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/// Add to zero extended.
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2022-03-30 00:48:43 +00:00
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/// addze addze. addzeo addzeo.
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2022-03-31 00:36:46 +00:00
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/// rD(), rA() [rc(), oe()]
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2022-03-29 00:20:59 +00:00
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addzex,
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2022-04-09 22:28:51 +00:00
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/// And.
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/// and, and.
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/// rA(), rS(), rB() [rc()]
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andx,
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2022-03-29 18:37:21 +00:00
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/// And with complement.
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/// andc, andc.
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2022-03-31 00:36:46 +00:00
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/// rA(), rS(), rB() [rc()]
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2022-03-29 18:37:21 +00:00
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andcx,
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/// And immediate.
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/// andi.
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2022-03-31 00:36:46 +00:00
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/// rA(), rS(), uimm()
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2022-03-29 18:37:21 +00:00
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andi_,
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/// And immediate shifted.
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/// andis.
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2022-03-31 00:36:46 +00:00
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/// rA(), rS(), uimm()
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2022-03-29 18:37:21 +00:00
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|
|
|
andis_,
|
2022-03-18 23:55:26 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Branch unconditional.
|
|
|
|
|
/// b bl ba bla
|
|
|
|
|
/// li() [aa(), lk()]
|
|
|
|
|
bx,
|
2022-03-18 23:55:26 +00:00
|
|
|
|
|
|
|
|
|
/// Branch conditional.
|
2022-03-30 00:48:43 +00:00
|
|
|
|
/// bne bne+ beq bdnzt+ bdnzf bdnzt bdnzfla ...
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// bo(), bi(), bd() [aa(), lk()]
|
2022-03-18 23:55:26 +00:00
|
|
|
|
bcx,
|
|
|
|
|
|
|
|
|
|
/// Branch conditional to count register.
|
2022-03-30 00:48:43 +00:00
|
|
|
|
/// bctr bctrl bnectrl bnectrl bltctr blectr ...
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// bo(), bi() [aa(), lk()]
|
2022-03-18 23:55:26 +00:00
|
|
|
|
bcctrx,
|
|
|
|
|
|
2022-03-25 10:25:06 +00:00
|
|
|
|
/// Branch conditional to link register.
|
2022-03-30 00:48:43 +00:00
|
|
|
|
/// blr blrl bltlr blelrl bnelrl ...
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// bo(), bi() [aa(), lk()]
|
2022-03-25 10:25:06 +00:00
|
|
|
|
bclrx,
|
|
|
|
|
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// Compare
|
|
|
|
|
/// cmp
|
|
|
|
|
/// crfD(), l(), rA(), rB()
|
|
|
|
|
cmp,
|
|
|
|
|
|
|
|
|
|
/// Compare immediate.
|
|
|
|
|
/// cmpi
|
|
|
|
|
/// crfD(), l(), rA(), simm()
|
|
|
|
|
cmpi,
|
|
|
|
|
|
|
|
|
|
/// Compare logical.
|
|
|
|
|
/// cmpl
|
|
|
|
|
/// crfD(), l(), rA(), rB()
|
|
|
|
|
cmpl,
|
|
|
|
|
|
|
|
|
|
/// Compare logical immediate.
|
|
|
|
|
/// cmpli
|
|
|
|
|
/// crfD(), l(), rA(), uimm()
|
|
|
|
|
cmpli,
|
|
|
|
|
|
|
|
|
|
/// Count leading zero words.
|
|
|
|
|
/// cntlzw cntlzw.
|
|
|
|
|
/// rA(), rS() [rc()]
|
2022-03-30 00:48:43 +00:00
|
|
|
|
cntlzwx,
|
|
|
|
|
|
|
|
|
|
/// Condition register and.
|
|
|
|
|
/// crand
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crand,
|
|
|
|
|
|
|
|
|
|
/// Condition register and with complement.
|
|
|
|
|
/// crandc
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crandc,
|
|
|
|
|
|
|
|
|
|
/// Condition register equivalent.
|
|
|
|
|
/// creqv
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
creqv,
|
|
|
|
|
|
|
|
|
|
/// Condition register nand.
|
|
|
|
|
/// crnand
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crnand,
|
|
|
|
|
|
|
|
|
|
/// Condition register nor.
|
|
|
|
|
/// crnor
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crnor,
|
|
|
|
|
|
|
|
|
|
/// Condition register or.
|
|
|
|
|
/// cror
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
cror,
|
|
|
|
|
|
|
|
|
|
/// Condition register or with complement.
|
|
|
|
|
/// crorc
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crorc,
|
|
|
|
|
|
|
|
|
|
/// Condition register xor.
|
|
|
|
|
/// crxor
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// crbD(), crbA(), crbB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
crxor,
|
|
|
|
|
|
2022-03-31 00:36:46 +00:00
|
|
|
|
/// Data cache block flush.
|
|
|
|
|
/// dcbf
|
|
|
|
|
/// rA(), rB()
|
2022-03-30 00:48:43 +00:00
|
|
|
|
dcbf,
|
2022-03-31 00:36:46 +00:00
|
|
|
|
|
|
|
|
|
/// Data cache block store.
|
|
|
|
|
/// dcbst
|
|
|
|
|
/// rA(), rB()
|
|
|
|
|
dcbst,
|
|
|
|
|
|
|
|
|
|
/// Data cache block touch.
|
|
|
|
|
/// dcbt
|
|
|
|
|
/// rA(), rB()
|
|
|
|
|
dcbt,
|
|
|
|
|
|
|
|
|
|
/// Data cache block touch for store.
|
|
|
|
|
/// dcbtst
|
|
|
|
|
/// rA(), rB()
|
|
|
|
|
dcbtst,
|
|
|
|
|
|
|
|
|
|
/// Data cache block set to zero.
|
|
|
|
|
/// dcbz
|
|
|
|
|
/// rA(), rB()
|
|
|
|
|
dcbz,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Divide word.
|
|
|
|
|
/// divw divw. divwo divwo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
|
|
|
|
divwx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Divide word unsigned.
|
|
|
|
|
/// divwu divwu. divwuo divwuo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
|
|
|
|
divwux,
|
|
|
|
|
|
2022-04-01 21:11:57 +00:00
|
|
|
|
/// External control in word indexed.
|
|
|
|
|
/// eciwx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
eciwx,
|
|
|
|
|
|
|
|
|
|
/// External control out word indexed.
|
|
|
|
|
/// ecowx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
ecowx,
|
|
|
|
|
|
|
|
|
|
/// Enforce in-order execition of I/O
|
|
|
|
|
/// eieio
|
|
|
|
|
eieio,
|
|
|
|
|
|
|
|
|
|
/// Equivalent.
|
|
|
|
|
/// eqv eqv.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
eqvx,
|
|
|
|
|
|
|
|
|
|
/// Extend sign byte.
|
|
|
|
|
/// extsb extsb.
|
|
|
|
|
/// rA(), rS() [rc()]
|
|
|
|
|
extsbx,
|
|
|
|
|
|
|
|
|
|
/// Extend sign half-word.
|
|
|
|
|
/// extsh extsh.
|
|
|
|
|
/// rA(), rS() [rc()]
|
|
|
|
|
extshx,
|
|
|
|
|
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// Floating point absolute.
|
|
|
|
|
/// fabs fabs.
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// frD(), frB() [rc()]
|
2022-04-02 23:58:21 +00:00
|
|
|
|
fabsx,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point add.
|
|
|
|
|
/// fadd fadd.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
faddx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point add single precision.
|
|
|
|
|
/// fadds fadds.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
faddsx,
|
|
|
|
|
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// Floating point compare ordered.
|
|
|
|
|
/// fcmpo
|
2022-04-03 19:50:03 +00:00
|
|
|
|
/// crfD(), frA(), frB()
|
2022-04-02 23:58:21 +00:00
|
|
|
|
fcmpo,
|
|
|
|
|
|
|
|
|
|
/// Floating point compare unordered.
|
|
|
|
|
/// fcmpu
|
2022-04-03 19:50:03 +00:00
|
|
|
|
/// crfD(), frA(), frB()
|
2022-04-02 23:58:21 +00:00
|
|
|
|
fcmpu,
|
|
|
|
|
|
|
|
|
|
/// Floating point convert to integer word.
|
|
|
|
|
/// fctiw fctiw.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fctiwx,
|
|
|
|
|
|
|
|
|
|
/// Floating point convert to integer word with round towards zero.
|
|
|
|
|
/// fctiw fctiw.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fctiwzx,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point divide.
|
|
|
|
|
/// fdiv fdiv.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
fdivx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point divide single precision.
|
|
|
|
|
/// fdiv fdiv.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
fdivsx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point multiply add.
|
|
|
|
|
/// fmadd fmadd.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fmaddx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point multiply add single precision.
|
|
|
|
|
/// fmadds fmadds.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fmaddsx,
|
|
|
|
|
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// Floating point register move.
|
|
|
|
|
/// fmr fmr.
|
|
|
|
|
/// frD(), frB() [rc()]
|
2022-04-02 23:58:21 +00:00
|
|
|
|
fmrx,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point multiply subtract.
|
|
|
|
|
/// fmsub fmsub.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fmsubx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point multiply subtract single precision.
|
|
|
|
|
/// fmsubx fmsubx.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fmsubsx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point multiply.
|
|
|
|
|
/// fmul fmul.
|
|
|
|
|
/// frD(), frA(), frC() [rc()]
|
|
|
|
|
fmulx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point multiply single precision.
|
|
|
|
|
/// fmuls fmuls.
|
|
|
|
|
/// frD(), frA(), frC() [rc()]
|
|
|
|
|
fmulsx,
|
|
|
|
|
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// Floating negative absolute value.
|
|
|
|
|
/// fnabs fnabs.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fnabsx,
|
|
|
|
|
|
|
|
|
|
/// Floating negative.
|
|
|
|
|
/// fneg fneg.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fnegx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point negative multiply add.
|
|
|
|
|
/// fnmadd fnmadd.
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
2022-04-09 14:20:03 +00:00
|
|
|
|
fnmaddx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point negative multiply add single precision.
|
|
|
|
|
/// fnmadds fnmadds.
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
2022-04-09 22:28:51 +00:00
|
|
|
|
fnmaddsx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point negative multiply subtract.
|
|
|
|
|
/// fnmsub fnmsub.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fnmsubx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point negative multiply add.
|
|
|
|
|
/// fnmsubs fnmsubs.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fnmsubsx,
|
|
|
|
|
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// Floating point round to single precision.
|
|
|
|
|
/// frsp frsp.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
frspx,
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Floating point subtract.
|
|
|
|
|
/// fsub fsub.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
fsubx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point subtract single precision.
|
|
|
|
|
/// fsubs fsubs.
|
|
|
|
|
/// frD(), frA(), frB() [rc()]
|
|
|
|
|
fsubsx,
|
|
|
|
|
|
2022-04-03 22:29:40 +00:00
|
|
|
|
/// Instruction cache block invalidate.
|
|
|
|
|
/// icbi
|
|
|
|
|
/// rA(), rB()
|
|
|
|
|
icbi,
|
|
|
|
|
|
|
|
|
|
/// Instruction synchronise.
|
|
|
|
|
/// isync
|
|
|
|
|
isync,
|
2022-04-02 19:27:12 +00:00
|
|
|
|
|
|
|
|
|
/// Load byte and zero.
|
|
|
|
|
/// lbz
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lbz,
|
|
|
|
|
|
|
|
|
|
/// Load byte and zero with update.
|
|
|
|
|
/// lbz
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lbzu,
|
2022-03-26 12:45:07 +00:00
|
|
|
|
|
|
|
|
|
/// Load byte and zero with update indexed.
|
2022-03-27 22:44:56 +00:00
|
|
|
|
/// lbzux
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-26 12:45:07 +00:00
|
|
|
|
lbzux,
|
|
|
|
|
|
|
|
|
|
/// Load byte and zero indexed.
|
2022-03-27 22:44:56 +00:00
|
|
|
|
/// lbzx
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-26 12:45:07 +00:00
|
|
|
|
lbzx,
|
|
|
|
|
|
2022-04-02 19:40:17 +00:00
|
|
|
|
/// Load floating point double precision.
|
|
|
|
|
/// lfd
|
|
|
|
|
/// frD(), d() [ rA() ]
|
|
|
|
|
lfd,
|
|
|
|
|
|
|
|
|
|
/// Load floating point double precision with update.
|
|
|
|
|
/// lfdu
|
|
|
|
|
/// frD(), d() [ rA() ]
|
|
|
|
|
lfdu,
|
|
|
|
|
|
|
|
|
|
/// Load floating point double precision with update indexed.
|
|
|
|
|
/// lfdux
|
|
|
|
|
/// frD(), rA(), rB()
|
|
|
|
|
lfdux,
|
|
|
|
|
|
|
|
|
|
/// Load floating point double precision indexed.
|
|
|
|
|
/// lfdx
|
|
|
|
|
/// frD(), rA(), rB()
|
|
|
|
|
lfdx,
|
|
|
|
|
|
|
|
|
|
/// Load floating point single precision.
|
|
|
|
|
/// lfs
|
|
|
|
|
/// frD(), d() [ rA() ]
|
|
|
|
|
lfs,
|
|
|
|
|
|
|
|
|
|
/// Load floating point single precision with update.
|
|
|
|
|
/// lfsu
|
|
|
|
|
/// frD(), d() [ rA() ]
|
|
|
|
|
lfsu,
|
|
|
|
|
|
|
|
|
|
/// Load floating point single precision with update indexed.
|
|
|
|
|
/// lfsux
|
|
|
|
|
/// frD(), rA(), rB()
|
|
|
|
|
lfsux,
|
|
|
|
|
|
|
|
|
|
/// Load floating point single precision indexed.
|
|
|
|
|
/// lfsx
|
|
|
|
|
/// frD(), rA(), rB()
|
|
|
|
|
lfsx,
|
2022-04-02 19:27:12 +00:00
|
|
|
|
|
|
|
|
|
/// Load half word algebraic.
|
|
|
|
|
/// lha
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lha,
|
|
|
|
|
|
|
|
|
|
/// Load half word algebraic with update.
|
|
|
|
|
/// lha
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lhau,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Load half-word algebraic with update indexed.
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// lhaux
|
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
lhaux,
|
|
|
|
|
|
|
|
|
|
/// Load half-word algebraic indexed.
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// lhax
|
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
lhax,
|
|
|
|
|
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// Load half word byte-reverse indexed.
|
|
|
|
|
/// lhbrx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lhbrx,
|
|
|
|
|
|
|
|
|
|
/// Load half word and zero.
|
|
|
|
|
/// lhz
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// rD(), d() [ rA() ]
|
2022-04-01 22:30:48 +00:00
|
|
|
|
lhz,
|
|
|
|
|
|
|
|
|
|
/// Load half-word and zero with update.
|
|
|
|
|
/// lhzu
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// rD(), d() [ rA() ]
|
2022-04-01 22:30:48 +00:00
|
|
|
|
lhzu,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Load half-word and zero with update indexed.
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// lhzux
|
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
lhzux,
|
|
|
|
|
|
|
|
|
|
/// Load half-word and zero indexed.
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// lhzx
|
|
|
|
|
/// rD(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
lhzx,
|
|
|
|
|
|
2022-04-02 14:26:47 +00:00
|
|
|
|
/// Load multiple word.
|
|
|
|
|
/// lmw
|
|
|
|
|
/// rD(), d() [ rA() ]
|
2022-03-27 12:47:01 +00:00
|
|
|
|
lmw,
|
2022-04-02 14:26:47 +00:00
|
|
|
|
|
|
|
|
|
/// Load string word immediate.
|
|
|
|
|
/// lswi
|
|
|
|
|
/// rD(), rA(), nb()
|
|
|
|
|
lswi,
|
|
|
|
|
|
|
|
|
|
/// Load string word indexed.
|
|
|
|
|
/// lswx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lswx,
|
|
|
|
|
|
|
|
|
|
/// Load word and reserve indexed.
|
|
|
|
|
/// lwarx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lwarx,
|
|
|
|
|
|
|
|
|
|
/// Load word byte-reverse indexed.
|
|
|
|
|
/// lwbrx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lwbrx,
|
|
|
|
|
|
|
|
|
|
/// Load word and zero.
|
|
|
|
|
/// lwz
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lwz,
|
|
|
|
|
|
|
|
|
|
/// Load word and zero with update.
|
|
|
|
|
/// lwzu
|
|
|
|
|
/// rD(), d() [ rA() ]
|
|
|
|
|
lwzu,
|
2022-03-26 00:31:47 +00:00
|
|
|
|
|
2022-03-26 12:45:07 +00:00
|
|
|
|
/// Load word and zero with update indexed.
|
2022-03-27 22:44:56 +00:00
|
|
|
|
/// lwzux
|
2022-03-26 00:31:47 +00:00
|
|
|
|
lwzux,
|
2022-03-26 00:23:21 +00:00
|
|
|
|
|
|
|
|
|
/// Load word and zero indexed.
|
2022-03-27 22:44:56 +00:00
|
|
|
|
/// lwzx
|
2022-03-26 00:23:21 +00:00
|
|
|
|
lwzx,
|
|
|
|
|
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// Move condition register field.
|
|
|
|
|
/// mcrf
|
|
|
|
|
/// crfD(), crfS()
|
|
|
|
|
mcrf,
|
|
|
|
|
|
|
|
|
|
/// Move to condition register from FPSCR.
|
|
|
|
|
/// mcrfs
|
|
|
|
|
/// crfD(), crfS()
|
|
|
|
|
mcrfs,
|
|
|
|
|
|
2022-04-03 12:55:28 +00:00
|
|
|
|
/// Move to condition register from XER.
|
|
|
|
|
/// mcrxr
|
|
|
|
|
/// crfD()
|
2022-04-03 12:06:59 +00:00
|
|
|
|
mcrxr,
|
2022-04-03 12:55:28 +00:00
|
|
|
|
|
|
|
|
|
/// Move from condition register.
|
|
|
|
|
/// mfcr
|
|
|
|
|
/// rD()
|
|
|
|
|
mfcr,
|
|
|
|
|
|
2022-04-04 00:33:32 +00:00
|
|
|
|
/// Move from FPSCR.
|
|
|
|
|
/// mffs mffs.
|
|
|
|
|
/// frD() [rc()]
|
|
|
|
|
mffsx,
|
|
|
|
|
|
|
|
|
|
/// Move from machine state register.
|
|
|
|
|
/// mfmsr
|
|
|
|
|
/// rD()
|
|
|
|
|
mfmsr,
|
|
|
|
|
|
|
|
|
|
/// Move from special purpose record.
|
|
|
|
|
/// mfmsr
|
|
|
|
|
/// rD(), spr()
|
|
|
|
|
mfspr,
|
|
|
|
|
|
|
|
|
|
/// Move from segment register.
|
|
|
|
|
/// mfsr
|
|
|
|
|
/// rD(), sr()
|
|
|
|
|
mfsr,
|
|
|
|
|
|
|
|
|
|
/// Move from segment register indirect.
|
|
|
|
|
/// mfsrin
|
|
|
|
|
/// rD(), rB()
|
|
|
|
|
mfsrin,
|
2022-03-30 00:48:43 +00:00
|
|
|
|
|
|
|
|
|
/// Move to condition register fields.
|
|
|
|
|
/// mtcrf
|
|
|
|
|
/// rS(), crm()
|
|
|
|
|
mtcrf,
|
|
|
|
|
|
2022-04-03 12:55:28 +00:00
|
|
|
|
/// Move to FPSCR bit 0.
|
|
|
|
|
/// mtfsb0 mtfsb0.
|
|
|
|
|
/// crbD()
|
|
|
|
|
mtfsb0x,
|
|
|
|
|
|
|
|
|
|
/// Move to FPSCR bit 1.
|
|
|
|
|
/// mtfsb1 mtfsb1.
|
|
|
|
|
/// crbD()
|
|
|
|
|
mtfsb1x,
|
|
|
|
|
|
|
|
|
|
/// Move to FPSCR fields.
|
|
|
|
|
/// mtfsf mtfsf.
|
|
|
|
|
/// fm(), frB() [rc()]
|
|
|
|
|
mtfsfx,
|
|
|
|
|
|
|
|
|
|
/// Move to FPSCR field immediate.
|
|
|
|
|
/// mtfsfi mtfsfi.
|
|
|
|
|
/// crfD(), imm()
|
|
|
|
|
mtfsfix,
|
|
|
|
|
|
2022-04-04 00:33:32 +00:00
|
|
|
|
/// Move to FPSCR.
|
|
|
|
|
/// mtfs
|
|
|
|
|
/// frS()
|
|
|
|
|
mtmsr,
|
|
|
|
|
|
|
|
|
|
/// Move to special purpose record.
|
|
|
|
|
/// mtmsr
|
|
|
|
|
/// rD(), spr()
|
|
|
|
|
mtspr,
|
|
|
|
|
|
|
|
|
|
/// Move to segment register.
|
|
|
|
|
/// mfsr
|
|
|
|
|
/// sr(), rS()
|
|
|
|
|
mtsr,
|
|
|
|
|
|
|
|
|
|
/// Move to segment register indirect.
|
|
|
|
|
/// mtsrin
|
|
|
|
|
/// rD(), rB()
|
|
|
|
|
mtsrin,
|
2022-03-30 00:48:43 +00:00
|
|
|
|
|
|
|
|
|
/// Multiply high word.
|
|
|
|
|
/// mulhw mulgw.
|
|
|
|
|
/// rD(), rA(), rB(), rc()
|
|
|
|
|
mulhwx,
|
|
|
|
|
|
|
|
|
|
/// Multiply high word unsigned.
|
|
|
|
|
/// mulhwu mulhwu.
|
|
|
|
|
/// rD(), rA(), rB(), rc()
|
|
|
|
|
mulhwux,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Multiply low immediate.
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// mulli
|
|
|
|
|
/// rD(), rA(), simm()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
mulli,
|
|
|
|
|
|
2022-03-30 00:48:43 +00:00
|
|
|
|
/// Multiply low word.
|
|
|
|
|
/// mullw mullw. mullwo mullwo.
|
|
|
|
|
/// rA(), rB(), rD()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
mullwx,
|
2022-03-30 00:48:43 +00:00
|
|
|
|
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// NAND.
|
|
|
|
|
/// nand nand.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
nandx,
|
|
|
|
|
|
|
|
|
|
/// 'Negate' (negative).
|
|
|
|
|
/// neg neg. nego nego.
|
|
|
|
|
/// rD(), rA() [rc(), oe()]
|
|
|
|
|
negx,
|
|
|
|
|
|
|
|
|
|
/// NOR
|
|
|
|
|
/// nor nor.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
norx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// OR.
|
|
|
|
|
/// or or.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
orx,
|
|
|
|
|
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// OR with complement.
|
|
|
|
|
/// orc orc.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
orcx,
|
|
|
|
|
|
|
|
|
|
/// OR immediate.
|
|
|
|
|
/// ori
|
|
|
|
|
/// rA(), rS(), uimm()
|
|
|
|
|
ori,
|
|
|
|
|
|
|
|
|
|
/// OR immediate shifted.
|
|
|
|
|
/// oris
|
|
|
|
|
/// rA(), rS(), uimm()
|
|
|
|
|
oris,
|
|
|
|
|
|
|
|
|
|
/// Return from interrupt.
|
|
|
|
|
/// rfi
|
|
|
|
|
rfi,
|
|
|
|
|
|
|
|
|
|
/// Rotate left word immediate then mask insert.
|
|
|
|
|
/// rlwimi rlwimi.
|
|
|
|
|
/// rA(), rS(), sh(), mb(), me() [rc()]
|
|
|
|
|
rlwimix,
|
2022-03-30 20:43:09 +00:00
|
|
|
|
|
|
|
|
|
/// Rotate left word immediate then AND with mask.
|
|
|
|
|
/// rlwinm rlwinm.
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// rA(), rS(), sh(), mb(), me() [rc()]
|
2022-03-30 20:43:09 +00:00
|
|
|
|
rlwinmx,
|
|
|
|
|
|
|
|
|
|
/// Rotate left word then AND with mask
|
|
|
|
|
/// rlwimi rlwimi.
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// rA(), rB(), rS(), mb(), me() [rc()]
|
2022-03-30 20:43:09 +00:00
|
|
|
|
rlwnmx,
|
|
|
|
|
|
2022-04-01 21:11:57 +00:00
|
|
|
|
/// System call.
|
|
|
|
|
/// sc
|
2022-03-31 00:36:46 +00:00
|
|
|
|
sc,
|
|
|
|
|
|
|
|
|
|
/// Shift left word.
|
|
|
|
|
/// slw slw.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
2022-04-01 21:11:57 +00:00
|
|
|
|
slwx,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Shift right algebraic word.
|
|
|
|
|
/// sraw sraw.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
srawx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Shift right algebraic word immediate.
|
|
|
|
|
/// srawi srawi.
|
|
|
|
|
/// rA(), rS(), sh() [rc()]
|
|
|
|
|
srawix,
|
|
|
|
|
|
2022-04-01 21:22:32 +00:00
|
|
|
|
/// Shift right word.
|
|
|
|
|
/// srw srw.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
srwx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Store byte indexed.
|
|
|
|
|
/// stbx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stbx,
|
|
|
|
|
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// Store byte.
|
|
|
|
|
/// stb
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
stb,
|
|
|
|
|
|
|
|
|
|
/// Store byte with update.
|
|
|
|
|
/// stbu
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
stbu,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Store byte with update indexed.
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// stbux
|
|
|
|
|
/// rS(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
stbux,
|
|
|
|
|
|
2022-04-01 22:30:48 +00:00
|
|
|
|
/// Store floating point double precision.
|
|
|
|
|
/// stfd
|
|
|
|
|
/// frS(), d() [ rA() ]
|
|
|
|
|
stfd,
|
|
|
|
|
|
|
|
|
|
/// Store floating point double precision with update.
|
|
|
|
|
/// stfdu
|
|
|
|
|
/// frS(), d() [ rA() ]
|
|
|
|
|
stfdu,
|
|
|
|
|
|
|
|
|
|
/// Store floating point double precision with update indexed.
|
|
|
|
|
/// stfdux
|
|
|
|
|
/// frS(), rA(), rB()
|
|
|
|
|
stfdux,
|
|
|
|
|
|
|
|
|
|
/// Store floating point double precision indexed.
|
|
|
|
|
/// stfdux
|
|
|
|
|
/// frS(), rA(), rB()
|
|
|
|
|
stfdx,
|
|
|
|
|
|
2022-04-02 00:37:36 +00:00
|
|
|
|
/// Store floating point single precision.
|
|
|
|
|
/// stfs
|
2022-04-02 19:40:17 +00:00
|
|
|
|
/// frS(), d() [ rA() ]
|
2022-04-02 00:37:36 +00:00
|
|
|
|
stfs,
|
|
|
|
|
|
|
|
|
|
/// Store floating point single precision with update.
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// stfsu
|
2022-04-02 19:40:17 +00:00
|
|
|
|
/// frS(), d() [ rA() ]
|
2022-04-02 00:37:36 +00:00
|
|
|
|
stfsu,
|
|
|
|
|
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// Store floating point single precision with update indexed.
|
|
|
|
|
/// stfsux
|
|
|
|
|
/// frS(), rA(), rB()
|
|
|
|
|
stfsux,
|
|
|
|
|
|
|
|
|
|
/// Store floating point single precisionindexed.
|
|
|
|
|
/// stfsx
|
|
|
|
|
/// frS(), rA(), rB()
|
|
|
|
|
stfsx,
|
|
|
|
|
|
|
|
|
|
/// Store half word.
|
|
|
|
|
/// sth
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
sth,
|
|
|
|
|
|
|
|
|
|
/// Store half word byte-reverse indexed.
|
|
|
|
|
/// sthbrx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
sthbrx,
|
|
|
|
|
|
|
|
|
|
/// Store half word with update.
|
|
|
|
|
/// sthu
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
sthu,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Store half-word with update indexed.
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// sthux
|
|
|
|
|
/// rS(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
sthux,
|
|
|
|
|
|
|
|
|
|
/// Store half-word indexed.
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// sthx
|
|
|
|
|
/// rS(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
sthx,
|
|
|
|
|
|
2022-04-02 19:27:12 +00:00
|
|
|
|
/// Store multiple word.
|
|
|
|
|
/// stmw
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
stmw,
|
|
|
|
|
|
|
|
|
|
/// Store string word immediate.
|
|
|
|
|
/// stswi
|
|
|
|
|
/// rS(), rA(), nb()
|
|
|
|
|
stswi,
|
|
|
|
|
|
|
|
|
|
/// Store string word indexed.
|
|
|
|
|
/// stswx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stswx,
|
|
|
|
|
|
|
|
|
|
/// Store word.
|
|
|
|
|
/// stw
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
stw,
|
2022-04-02 00:37:36 +00:00
|
|
|
|
|
|
|
|
|
/// Store word byte-reverse indexed.
|
|
|
|
|
/// stwbrx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stwbrx,
|
|
|
|
|
|
|
|
|
|
/// Store word conditional.
|
|
|
|
|
/// stwcx.
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stwcx_,
|
|
|
|
|
|
|
|
|
|
/// Store word with update.
|
|
|
|
|
/// stwu
|
|
|
|
|
/// rS(), d() [ rA() ]
|
|
|
|
|
stwu,
|
2022-03-27 12:47:01 +00:00
|
|
|
|
|
|
|
|
|
/// Store word with update indexed.
|
2022-04-02 00:37:36 +00:00
|
|
|
|
/// stwux
|
|
|
|
|
/// rS(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
stwux,
|
|
|
|
|
|
|
|
|
|
/// Store word indexed.
|
2022-04-02 00:37:36 +00:00
|
|
|
|
/// stwx
|
|
|
|
|
/// rS(), rA(), rB()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
stwx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Subtract from.
|
|
|
|
|
/// subf subf. subfo subfo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
|
|
|
|
subfx,
|
|
|
|
|
|
2022-03-29 00:18:41 +00:00
|
|
|
|
/// Subtract from carrying.
|
2022-03-30 00:48:43 +00:00
|
|
|
|
/// subfc subfc. subfco subfco.
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
2022-03-29 00:18:41 +00:00
|
|
|
|
subfcx,
|
2022-04-02 00:37:36 +00:00
|
|
|
|
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// Subtract from extended.
|
|
|
|
|
/// subfe subfe. subfeo subfeo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
2022-03-27 12:47:01 +00:00
|
|
|
|
subfex,
|
|
|
|
|
|
|
|
|
|
/// Subtract from immediate carrying
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// subfic
|
|
|
|
|
/// rD(), rA(), simm()
|
2022-03-27 12:47:01 +00:00
|
|
|
|
subfic,
|
|
|
|
|
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// Subtract from minus one extended.
|
|
|
|
|
/// subfme subfme. subfmeo subfmeo.
|
|
|
|
|
/// rD(), rA() [rc(), oe()]
|
|
|
|
|
subfmex,
|
|
|
|
|
|
|
|
|
|
/// Subtract from zero extended.
|
|
|
|
|
/// subfze subfze. subfzeo subfzeo.
|
|
|
|
|
/// rD(), rA() [rc(), oe()]
|
|
|
|
|
subfzex,
|
|
|
|
|
|
|
|
|
|
/// Synchronise.
|
|
|
|
|
/// sync
|
|
|
|
|
sync,
|
2022-04-02 14:09:58 +00:00
|
|
|
|
|
|
|
|
|
/// Trap word.
|
|
|
|
|
/// tw tweq tweqi twge twgei ...
|
|
|
|
|
/// to(), rA(), rB()
|
|
|
|
|
tw,
|
|
|
|
|
|
|
|
|
|
/// Trap word immediate.
|
|
|
|
|
/// twi
|
|
|
|
|
/// to(), rA(), simm()
|
|
|
|
|
twi,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Xor.
|
|
|
|
|
/// xor xor.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
xorx,
|
|
|
|
|
|
2022-04-02 14:09:58 +00:00
|
|
|
|
/// Xor immediate.
|
|
|
|
|
/// xori
|
|
|
|
|
/// rA(), rs(), uimm()
|
|
|
|
|
xori,
|
|
|
|
|
|
|
|
|
|
/// Xor immediate shifted.
|
|
|
|
|
/// xoris
|
|
|
|
|
/// rA(), rS(), uimm()
|
|
|
|
|
xoris,
|
2021-01-01 02:12:36 +00:00
|
|
|
|
|
2022-03-27 22:44:56 +00:00
|
|
|
|
//
|
|
|
|
|
// MARK: - 32-bit, supervisor level.
|
|
|
|
|
//
|
2022-03-31 00:36:46 +00:00
|
|
|
|
|
|
|
|
|
/// Data cache block invalidate.
|
|
|
|
|
/// dcbi
|
|
|
|
|
/// rA(), rB()
|
2020-12-31 03:55:59 +00:00
|
|
|
|
dcbi,
|
2021-01-01 02:12:36 +00:00
|
|
|
|
|
2022-03-27 22:44:56 +00:00
|
|
|
|
//
|
|
|
|
|
// MARK: - Supervisor, optional.
|
|
|
|
|
//
|
2022-04-04 00:33:32 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Translation lookaside buffer ('TLB') invalidate all.
|
2022-04-04 00:33:32 +00:00
|
|
|
|
/// tlbia
|
|
|
|
|
tlbia,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Translation lookaside buffer ('TLB') invalidate entry.
|
2022-04-04 00:33:32 +00:00
|
|
|
|
/// tlbie
|
|
|
|
|
/// rB()
|
|
|
|
|
tlbie,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Translation lookaside buffer ('TLB') synchronise.
|
2022-04-04 00:33:32 +00:00
|
|
|
|
/// tlbsync
|
|
|
|
|
tlbsync,
|
2021-01-01 02:12:36 +00:00
|
|
|
|
|
2022-03-27 22:44:56 +00:00
|
|
|
|
//
|
|
|
|
|
// MARK: - Optional.
|
|
|
|
|
//
|
2022-04-02 23:58:21 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Move from time base.
|
|
|
|
|
/// mftb
|
|
|
|
|
/// rD(), tbr()
|
|
|
|
|
mftb,
|
|
|
|
|
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// Floaring point reciprocal estimate single precision.
|
|
|
|
|
/// fres fres.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fresx,
|
|
|
|
|
|
2022-04-03 12:06:59 +00:00
|
|
|
|
/// Floating point reciprocal square root estimation.
|
|
|
|
|
/// frsqrte frsqrte.
|
|
|
|
|
/// frD(), frB() [rc()]
|
2022-04-02 23:58:21 +00:00
|
|
|
|
frsqrtex,
|
|
|
|
|
|
|
|
|
|
/// Floating point select.
|
|
|
|
|
/// fsel fsel.
|
|
|
|
|
/// frD(), frA(), frC(), frB() [rc()]
|
|
|
|
|
fselx,
|
|
|
|
|
|
2022-04-08 14:01:52 +00:00
|
|
|
|
/// Floating Point square root.
|
|
|
|
|
/// fsqrt fsqrt.
|
|
|
|
|
/// frD(), frB() [rc()]
|
2022-04-02 23:58:21 +00:00
|
|
|
|
fsqrtx,
|
2022-04-02 14:09:58 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Floating point square root single precision.
|
|
|
|
|
/// fsqrts fsqrts.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fsqrtsx,
|
|
|
|
|
|
2022-04-02 00:37:36 +00:00
|
|
|
|
/// Store floating point as integer word indexed.
|
|
|
|
|
/// stfiwx
|
|
|
|
|
/// frS(), rA(), rB()
|
|
|
|
|
stfiwx,
|
2020-12-31 03:55:59 +00:00
|
|
|
|
|
2022-03-27 12:47:01 +00:00
|
|
|
|
//
|
2022-03-27 22:44:56 +00:00
|
|
|
|
// MARK: - 64-bit only PowerPC instructions.
|
2022-03-27 12:47:01 +00:00
|
|
|
|
//
|
2022-04-01 21:11:57 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Count leading zero double word.
|
|
|
|
|
/// cntlzd cntlzd.
|
|
|
|
|
/// rA(), rS() [rc()]
|
|
|
|
|
cntlzdx,
|
2022-04-01 21:11:57 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Divide double word.
|
|
|
|
|
/// divd divd. divdo divdo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
|
|
|
|
divdx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Divide double word unsigned.
|
|
|
|
|
/// divdu divdu. divduo divduo.
|
|
|
|
|
/// rD(), rA(), rB() [rc(), oe()]
|
|
|
|
|
divdux,
|
|
|
|
|
|
2022-04-01 21:11:57 +00:00
|
|
|
|
/// Extend sign word.
|
|
|
|
|
/// extsw extsw.
|
|
|
|
|
/// rA(), rS() [rc()]
|
|
|
|
|
extswx,
|
|
|
|
|
|
2022-04-02 23:58:21 +00:00
|
|
|
|
/// Floating point convert from integer double word.
|
|
|
|
|
/// fcfid fcfid.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fcfidx,
|
|
|
|
|
|
|
|
|
|
/// Floating point convert to integer double word.
|
|
|
|
|
/// fctid fctid.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fctidx,
|
|
|
|
|
|
|
|
|
|
/// Floating point convert to integer double word with round towards zero.
|
|
|
|
|
/// fctid fctid.
|
|
|
|
|
/// frD(), frB() [rc()]
|
|
|
|
|
fctidzx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// TODO
|
|
|
|
|
ld,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Load double word and reserve indezed.
|
|
|
|
|
/// ldarx
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
ldarx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// TODO
|
|
|
|
|
ldu,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Load double word with update indexed.
|
|
|
|
|
/// ldux
|
|
|
|
|
/// frD(), rA(), rB()
|
|
|
|
|
ldux,
|
|
|
|
|
|
|
|
|
|
/// Load double word indexed.
|
|
|
|
|
/// ldx
|
|
|
|
|
/// frD(), d() [ rA() ]
|
|
|
|
|
ldx,
|
|
|
|
|
|
|
|
|
|
/// Load word algebraic.
|
|
|
|
|
/// lwa
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lwa,
|
|
|
|
|
|
|
|
|
|
/// Load word algebraic with update indexed.
|
|
|
|
|
/// lwaux
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lwaux,
|
|
|
|
|
|
|
|
|
|
/// Load word algebraic indexed.
|
|
|
|
|
/// lwax
|
|
|
|
|
/// rD(), rA(), rB()
|
|
|
|
|
lwax,
|
|
|
|
|
|
|
|
|
|
/// Multiply high double word.
|
|
|
|
|
/// mulhd mulhd.
|
|
|
|
|
/// rD(), rA(), rB() [rc()]
|
|
|
|
|
mulhdx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Multiply high double word unsigned.
|
|
|
|
|
/// mulhdy mulhdu.
|
|
|
|
|
/// rD(), rA(), rB() [rc()]
|
|
|
|
|
mulhdux,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Multiply low double word.
|
|
|
|
|
/// mulld mulld. mulldo mulldo.
|
|
|
|
|
/// rD(), rA(), rB() [rc()]
|
2022-04-09 22:28:51 +00:00
|
|
|
|
mulldx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldclx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldcrx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldicx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldiclx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldicrx,
|
|
|
|
|
|
|
|
|
|
/// TODO
|
|
|
|
|
rldimix,
|
2022-04-09 14:20:03 +00:00
|
|
|
|
|
|
|
|
|
/// Segment lookaside buffer ('SLB') invalidate all.
|
|
|
|
|
/// slbia
|
|
|
|
|
slbia,
|
|
|
|
|
|
|
|
|
|
/// Segment lookaside buffer ('SLB') invalidate entry.
|
|
|
|
|
/// slbie
|
|
|
|
|
/// rB()
|
|
|
|
|
slbie,
|
|
|
|
|
|
|
|
|
|
/// Shift left double word.
|
|
|
|
|
/// sld sld.
|
|
|
|
|
/// rA(), rS(), rB()
|
|
|
|
|
sldx,
|
|
|
|
|
|
|
|
|
|
/// Shift right algebraic double word.
|
|
|
|
|
/// srad srad,
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
sradx,
|
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
/// Shift right algebraic double word immediate.
|
|
|
|
|
/// sradi sradi.
|
|
|
|
|
/// rA(), rS(),sh() [rc()]
|
|
|
|
|
sradix,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Shift right double word.
|
|
|
|
|
/// srd srd.
|
|
|
|
|
/// rA(), rS(), rB() [rc()]
|
|
|
|
|
srdx,
|
2022-04-01 22:30:48 +00:00
|
|
|
|
|
|
|
|
|
/// Store double.
|
|
|
|
|
/// std
|
|
|
|
|
/// rS(), ds() [ rA() ]
|
|
|
|
|
std,
|
|
|
|
|
|
|
|
|
|
/// Store double word conditional indexed.
|
|
|
|
|
/// stdcx.
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stdcx_,
|
|
|
|
|
|
|
|
|
|
/// Store double word with update.
|
|
|
|
|
/// stdu
|
|
|
|
|
/// rS(), ds() [ rA() ]
|
|
|
|
|
stdu,
|
|
|
|
|
|
|
|
|
|
/// Store double word with update indexed.
|
|
|
|
|
/// stdux
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stdux,
|
|
|
|
|
|
|
|
|
|
/// Store double word indexed.
|
|
|
|
|
/// stdx
|
|
|
|
|
/// rS(), rA(), rB()
|
|
|
|
|
stdx,
|
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Trap double word.
|
|
|
|
|
/// td
|
|
|
|
|
/// to(), rA(), rB()
|
|
|
|
|
td,
|
2022-04-01 21:11:57 +00:00
|
|
|
|
|
2022-04-09 14:20:03 +00:00
|
|
|
|
/// Trap double word immediate.
|
|
|
|
|
/// tdi
|
|
|
|
|
/// to(), rA(), simm()
|
|
|
|
|
tdi,
|
2020-12-31 03:55:59 +00:00
|
|
|
|
};
|
|
|
|
|
|
2020-12-31 21:51:31 +00:00
|
|
|
|
/*!
|
|
|
|
|
Holds a decoded PowerPC instruction.
|
|
|
|
|
|
|
|
|
|
Implementation note: because the PowerPC encoding is particularly straightforward,
|
|
|
|
|
only the operation has been decoded ahead of time; all other fields are decoded on-demand.
|
2021-01-09 03:22:07 +00:00
|
|
|
|
|
|
|
|
|
It would be possible to partition the ordering of Operations into user followed by supervisor,
|
|
|
|
|
eliminating the storage necessary for a flag, but it wouldn't save anything due to alignment.
|
2020-12-31 21:51:31 +00:00
|
|
|
|
*/
|
2020-12-31 03:55:59 +00:00
|
|
|
|
struct Instruction {
|
2021-01-03 03:47:42 +00:00
|
|
|
|
Operation operation = Operation::Undefined;
|
|
|
|
|
bool is_supervisor = false;
|
|
|
|
|
uint32_t opcode = 0;
|
2020-12-31 03:55:59 +00:00
|
|
|
|
|
2021-01-09 03:38:56 +00:00
|
|
|
|
Instruction() noexcept {}
|
|
|
|
|
Instruction(uint32_t opcode) noexcept : opcode(opcode) {}
|
|
|
|
|
Instruction(Operation operation, uint32_t opcode, bool is_supervisor = false) noexcept : operation(operation), is_supervisor(is_supervisor), opcode(opcode) {}
|
2020-12-31 03:55:59 +00:00
|
|
|
|
|
2021-01-01 16:46:26 +00:00
|
|
|
|
// Instruction fields are decoded below; naming is a compromise between
|
|
|
|
|
// Motorola's documentation and IBM's.
|
|
|
|
|
//
|
|
|
|
|
// I've dutifully implemented various synonyms with unique entry points,
|
|
|
|
|
// in order to capture that information here rather than thrusting it upon
|
|
|
|
|
// the reader of whatever implementation may follow.
|
2020-12-31 21:51:31 +00:00
|
|
|
|
|
2021-01-01 21:38:40 +00:00
|
|
|
|
// Currently omitted: OPCD and XO, which I think are unnecessary given that
|
|
|
|
|
// full decoding has already occurred.
|
2021-01-01 02:12:36 +00:00
|
|
|
|
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Immediate field used to specify an unsigned 16-bit integer.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint16_t uimm() const { return uint16_t(opcode & 0xffff); }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Immediate field used to specify a signed 16-bit integer.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int16_t simm() const { return int16_t(opcode & 0xffff); }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
/// Immediate field used to specify a signed 16-bit integer.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int16_t d() const { return int16_t(opcode & 0xffff); }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
/// Immediate field used to specify a signed 14-bit integer [64-bit only].
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int16_t ds() const { return int16_t(opcode & 0xfffc); }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Immediate field used as data to be placed into a field in the floating point status and condition register.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int32_t imm() const { return (opcode >> 12) & 0xf; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Specifies the conditions on which to trap.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int32_t to() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Register source A or destination.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t rA() const { return (opcode >> 16) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Register source B.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t rB() const { return (opcode >> 11) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Register destination.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t rD() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Register source.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t rS() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Floating point register source A.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t frA() const { return (opcode >> 16) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Floating point register source B.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t frB() const { return (opcode >> 11) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Floating point register source C.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t frC() const { return (opcode >> 6) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Floating point register source.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t frS() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Floating point register destination.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t frD() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
2022-03-25 00:44:03 +00:00
|
|
|
|
/// Branch conditional options as per PowerPC spec, i.e. options + branch-prediction flag.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t bo() const { return (opcode >> 21) & 0x1f; }
|
2022-03-25 00:44:03 +00:00
|
|
|
|
/// Just the branch options, with the branch prediction flag severed.
|
2022-03-25 12:41:57 +00:00
|
|
|
|
BranchOption branch_options() const {
|
|
|
|
|
return BranchOption((opcode >> 22) & 0xf);
|
2022-03-25 00:44:03 +00:00
|
|
|
|
}
|
|
|
|
|
/// Just the branch-prediction hint; @c 0 => expect untaken; @c non-0 => expect take.
|
|
|
|
|
uint32_t branch_prediction_hint() const {
|
|
|
|
|
return opcode & 0x200000;
|
|
|
|
|
}
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Source condition register bit for branch conditionals.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t bi() const { return (opcode >> 16) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Branch displacement; provided as already sign extended.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int16_t bd() const { return int16_t(opcode & 0xfffc); }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
2022-04-09 22:28:51 +00:00
|
|
|
|
// TODO: both MB/ME and mb/me fields seem to be defined. Investigate.
|
|
|
|
|
|
2021-01-01 21:38:40 +00:00
|
|
|
|
/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t mb() const { return (opcode >> 6) & 0x1f; }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t me() const { return (opcode >> 1) & 0x1f; }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Condition register source bit A.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crbA() const { return (opcode >> 16) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Condition register source bit B.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crbB() const { return (opcode >> 11) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Condition register (or floating point status & condition register) destination bit.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crbD() const { return (opcode >> 21) & 0x1f; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Condition register (or floating point status & condition register) destination field.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crfD() const { return (opcode >> 23) & 0x07; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Condition register (or floating point status & condition register) source field.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crfS() const { return (opcode >> 18) & 0x07; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Mask identifying fields to be updated by mtcrf.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t crm() const { return (opcode >> 12) & 0xff; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
|
|
|
|
/// Mask identifying fields to be updated by mtfsf.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t fm() const { return (opcode >> 17) & 0xff; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
|
2021-01-01 21:38:40 +00:00
|
|
|
|
/// Specifies the number of bytes to move in an immediate string load or store.
|
2022-04-03 22:29:40 +00:00
|
|
|
|
uint32_t nb() const {
|
|
|
|
|
// Map nb == 0 to 32, branchlessly, given that this is
|
|
|
|
|
// a five-bit field.
|
|
|
|
|
const uint32_t nb = (opcode >> 11) & 0x1f;
|
|
|
|
|
return ((nb - 1) & 31) + 1;
|
|
|
|
|
}
|
2021-01-01 21:38:40 +00:00
|
|
|
|
|
|
|
|
|
/// Specifies a shift amount.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t sh() const { return (opcode >> 11) & 0x1f; }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
|
|
|
|
|
/// Specifies one of the 16 segment registers [32-bit only].
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t sr() const { return (opcode >> 16) & 0xf; }
|
2021-01-01 21:38:40 +00:00
|
|
|
|
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// A 24-bit signed number; provided as already sign extended.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
int32_t li() const {
|
2021-01-01 16:46:26 +00:00
|
|
|
|
constexpr uint32_t extensions[2] = {
|
|
|
|
|
0x0000'0000,
|
|
|
|
|
0xfc00'0000
|
|
|
|
|
};
|
2021-01-03 16:14:43 +00:00
|
|
|
|
const uint32_t value = (opcode & 0x03ff'fffc) | extensions[(opcode >> 25) & 1];
|
2021-01-01 16:46:26 +00:00
|
|
|
|
return int32_t(value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/// Absolute address bit; @c 0 or @c non-0.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t aa() const { return opcode & 0x02; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Link bit; @c 0 or @c non-0.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t lk() const { return opcode & 0x01; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Record bit; @c 0 or @c non-0.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t rc() const { return opcode & 0x01; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Whether to compare 32-bit or 64-bit numbers [for 64-bit implementations only]; @c 0 or @c non-0.
|
2021-01-05 03:36:39 +00:00
|
|
|
|
uint32_t l() const { return opcode & 0x200000; }
|
2021-01-01 16:46:26 +00:00
|
|
|
|
/// Enables setting of OV and SO in the XER; @c 0 or @c non-0.
|
2022-03-29 00:39:52 +00:00
|
|
|
|
uint32_t oe() const { return opcode & 0x400; }
|
2022-04-04 00:33:32 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/// Identifies a special purpose register.
|
|
|
|
|
uint32_t spr() const { return (opcode >> 11) & 0x3ff; }
|
|
|
|
|
/// Identifies a time base register.
|
|
|
|
|
uint32_t tbr() const { return (opcode >> 11) & 0x3ff; }
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2020-12-31 03:55:59 +00:00
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};
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2021-01-15 23:16:01 +00:00
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// Sanity check on Instruction size.
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2021-01-09 03:38:56 +00:00
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static_assert(sizeof(Instruction) <= 8);
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2020-12-31 03:55:59 +00:00
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}
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}
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2021-01-15 23:16:01 +00:00
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#endif /* InstructionSets_PowerPC_Instruction_h */
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