2020-09-24 02:14:42 +00:00
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//
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// 65816Implementation.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 23/09/2020.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#ifndef WDC65816Implementation_h
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#define WDC65816Implementation_h
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2020-09-25 02:27:20 +00:00
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enum MicroOp: uint8_t {
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/// Fetches a byte from the program counter to the instruction buffer and increments the program counter.
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CycleFetchIncrementPC,
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/// Fetches a byte from the program counter without incrementing it, and throws it away.
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CycleFetchPC,
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/// Fetches a byte from the data address to the data buffer.
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CycleFetchData,
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/// Fetches a byte from the data address to the data buffer and increments the data address.
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CycleFetchIncrementData,
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2020-09-26 01:16:36 +00:00
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/// Fetches from the address formed by the low byte of the data address and the high byte
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/// of the instruction buffer, throwing the result away.
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CycleFetchIncorrectDataAddress,
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2020-09-25 02:27:20 +00:00
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2020-09-27 00:38:29 +00:00
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/// Fetches a vector (i.e. IRQ, NMI, etc) into the data buffer.
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CycleFetchVector,
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2020-09-26 01:49:03 +00:00
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// Dedicated block-move cycles; these use the data buffer as an intermediary.
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CycleFetchBlockX,
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CycleFetchBlockY,
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CycleStoreBlockY,
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2020-09-25 02:27:20 +00:00
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/// Stores a byte from the data buffer.
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CycleStoreData,
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/// Stores a byte to the data address from the data buffer and increments the data address.
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CycleStoreIncrementData,
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/// Stores a byte to the data address from the data buffer and decrements the data address.
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CycleStoreDecrementData,
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/// Pushes a single byte from the data buffer to the stack.
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CyclePush,
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2020-09-25 22:35:00 +00:00
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/// Fetches from the current stack location and throws the result away.
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CycleAccessStack,
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2020-09-27 00:38:29 +00:00
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/// Pulls a single byte to the data buffer from the stack.
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CyclePull,
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2020-09-25 02:27:20 +00:00
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/// Sets the data address by copying the final two bytes of the instruction buffer.
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OperationConstructAbsolute,
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2020-09-25 22:35:00 +00:00
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/// Sets the data address to the result of (a, x).
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/// TODO: explain better once implemented.
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2020-09-25 02:27:20 +00:00
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OperationConstructAbsoluteIndexedIndirect,
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2020-09-25 23:27:17 +00:00
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OperationConstructAbsoluteLongX,
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2020-09-25 02:27:20 +00:00
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2020-09-26 01:16:36 +00:00
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/// Calculates an a, x address; if:
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/// there was no carry into the top byte of the address; and
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/// the process or in emulation or 8-bit index mode;
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/// then it also skips the next micro-op.
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OperationConstructAbsoluteXRead,
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/// Calculates an a, x address.
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OperationConstructAbsoluteX,
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// These are analogous to the X versions above.
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OperationConstructAbsoluteY,
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OperationConstructAbsoluteYRead,
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2020-09-26 02:01:36 +00:00
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/// Constructs the current direct address using the value in the instruction buffer.
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/// Skips the next micro-op if the low byte of the direct register is 0.
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OperationConstructDirect,
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2020-09-26 02:22:30 +00:00
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// These follow similar skip-one-if-possible logic to OperationConstructDirect.
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OperationConstructDirectIndexedIndirect,
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OperationConstructDirectIndirect,
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2020-09-26 20:55:58 +00:00
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OperationConstructDirectIndirectIndexed,
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OperationConstructDirectIndirectIndexedLong,
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OperationConstructDirectIndirectLong,
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2020-09-26 21:26:17 +00:00
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OperationConstructDirectX,
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OperationConstructDirectY,
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2020-09-26 02:22:30 +00:00
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2020-09-27 00:57:24 +00:00
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OperationConstructPER,
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2020-09-27 01:20:01 +00:00
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OperationConstructBRK,
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2020-09-27 00:57:24 +00:00
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2020-09-27 01:35:31 +00:00
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OperationConstructStackRelative,
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OperationConstructStackRelativeIndexedIndirect,
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2020-09-25 02:27:20 +00:00
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/// Performs whatever operation goes with this program.
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OperationPerform,
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2020-09-25 02:37:31 +00:00
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/// Copies the current program counter to the data buffer.
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OperationCopyPCToData,
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2020-09-26 21:42:42 +00:00
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OperationCopyInstructionToData,
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2020-09-25 02:37:31 +00:00
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2020-09-25 22:35:00 +00:00
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/// Copies the current PBR to the data buffer.
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OperationCopyPBRToData,
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2020-09-26 01:16:36 +00:00
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OperationCopyAToData,
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OperationCopyDataToA,
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2020-09-27 00:38:29 +00:00
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/// Fills the data buffer with three or four bytes, depending on emulation mode, containing the program
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/// counter, flags and possibly the program bank. Also puts the appropriate vector address into the
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/// address register.
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OperationPrepareException,
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2020-09-25 02:27:20 +00:00
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/// Complete this set of micr-ops.
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OperationMoveToNextProgram
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};
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2020-09-24 02:23:23 +00:00
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2020-09-25 21:18:25 +00:00
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enum Operation: uint8_t {
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// These perform the named operation using the value in the data buffer;
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// they are implicitly AccessType::Read.
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ADC, AND, BIT, CMP, CPX, CPY, EOR, ORA, SBC,
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// These load the respective register from the data buffer;
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// they are implicitly AccessType::Read.
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LDA, LDX, LDY,
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PLB, PLD, PLP, // LDA, LDX and LDY can be used for PLA, PLX, PLY.
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2020-09-25 21:18:25 +00:00
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// These move the respective register (or value) to the data buffer;
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// they are implicitly AccessType::Write.
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STA, STX, STY, STZ,
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PHB, PHP, PHD, PHK,
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2020-09-25 21:18:25 +00:00
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2020-09-26 01:16:36 +00:00
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// These modify the value in the data buffer as part of a read-modify-write.
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ASL, DEC, INC, LSR, ROL, ROR, TRB, TSB,
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2020-09-26 01:49:03 +00:00
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// These merely decrement A, increment or decrement X and Y, and regress
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// the program counter only if appropriate.
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MVN, MVP,
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2020-09-26 21:42:42 +00:00
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// These use a value straight from the instruction buffer.
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REP, SEP,
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2020-09-27 00:24:50 +00:00
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BCC, BCS, BEQ, BMI, BNE, BPL, BRA, BVC, BVS, BRL,
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2020-09-26 21:42:42 +00:00
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// These are all implicit.
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CLC, CLD, CLI, CLV, DEX, DEY, INX, INY, NOP, SEC, SED, SEI,
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TAX, TAY, TCD, TCS, TDC, TSC, TSX, TXA, TXS, TXY, TYA, TYX,
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XCE, XBA,
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2020-09-27 00:18:30 +00:00
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STP, WAI,
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2020-09-27 01:20:01 +00:00
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// These unpack values from the data buffer, which has been filled
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// from the stack.
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RTI, RTL,
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2020-09-25 21:18:25 +00:00
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/// Loads the PC with the operand from the data buffer.
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JMP,
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2020-09-25 22:00:02 +00:00
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/// Loads the PC and PBR with the operand from the data buffer.
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JML,
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2020-09-25 22:35:00 +00:00
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/// Loads the PC with the operand from the data buffer, replacing
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2020-09-25 21:18:25 +00:00
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/// it with the old PC.
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JSR,
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2020-09-25 22:35:00 +00:00
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/// Loads the PC and the PBR with the operand from the data buffer,
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/// replacing it with the old PC (and only the PC; PBR not included).
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JSL,
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2020-09-27 01:20:01 +00:00
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/// i.e. jump to vector. TODO: is this really distinct from JMP? I'm assuming so for now,
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/// as I assume the PBR is implicitly modified. We'll see.
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BRK,
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2020-09-25 02:27:20 +00:00
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};
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2020-09-24 02:14:42 +00:00
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2020-09-25 02:27:20 +00:00
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class ProcessorStorageConstructor;
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2020-09-24 02:14:42 +00:00
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2020-09-25 02:27:20 +00:00
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class ProcessorStorage {
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public:
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ProcessorStorage();
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2020-09-24 02:14:42 +00:00
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2020-09-27 01:43:26 +00:00
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// Frustratingly, there is not quite enough space in 16 bits to store both
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// the program offset and the operation as currently defined.
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2020-09-24 02:14:42 +00:00
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struct Instruction {
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uint16_t program_offset;
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2020-09-24 02:14:42 +00:00
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Operation operation;
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};
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2020-09-27 01:43:26 +00:00
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Instruction instructions[513]; // Arranged as:
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// 256 entries: emulation-mode instructions;
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// 256 entries: 16-bit instructions; and
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// the entry for 'exceptions' (i.e. reset, irq, nmi).
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2020-09-24 02:14:42 +00:00
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private:
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2020-09-25 21:18:25 +00:00
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friend ProcessorStorageConstructor;
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2020-09-24 02:14:42 +00:00
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2020-09-25 22:00:02 +00:00
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// Registers.
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RegisterPair16 a_;
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RegisterPair16 x_, y_;
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uint16_t pc_, s_;
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2020-09-27 01:43:26 +00:00
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// I.e. the offset for direct addressing (outside of emulation mode).
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2020-09-25 22:00:02 +00:00
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uint16_t direct_;
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// Banking registers are all stored with the relevant byte
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// shifted up bits 16–23.
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uint32_t data_bank_; // i.e. DBR.
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uint32_t program_bank_; // i.e. PBR.
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2020-09-25 21:18:25 +00:00
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std::vector<MicroOp> micro_ops_;
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2020-09-24 02:14:42 +00:00
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};
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#endif /* WDC65816Implementation_h */
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