2015-07-17 00:15:30 +00:00
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//
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// Machine.m
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2015-07-26 19:25:11 +00:00
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// CLK
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2015-07-17 00:15:30 +00:00
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//
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// Created by Thomas Harte on 29/06/2015.
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2018-05-13 19:19:52 +00:00
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// Copyright 2015 Thomas Harte. All rights reserved.
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2015-07-17 00:15:30 +00:00
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//
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2017-05-15 12:18:57 +00:00
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#import "TestMachine6502.h"
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2015-07-17 00:15:30 +00:00
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#include <stdint.h>
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2018-08-07 01:15:13 +00:00
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#include "../../../../Processors/6502/AllRAM/6502AllRAM.hpp"
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2017-06-04 01:22:16 +00:00
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#import "TestMachine+ForSubclassEyesOnly.h"
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2015-07-17 00:15:30 +00:00
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2017-07-24 02:22:50 +00:00
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const uint8_t CSTestMachine6502JamOpcode = CPU::MOS6502::JamOpcode;
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2017-05-17 02:05:42 +00:00
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#pragma mark - Register enum map
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2015-07-17 00:15:30 +00:00
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2017-05-17 02:05:42 +00:00
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static CPU::MOS6502::Register registerForRegister(CSTestMachine6502Register reg) {
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2015-07-17 00:15:30 +00:00
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switch (reg) {
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2017-05-15 12:18:57 +00:00
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case CSTestMachine6502RegisterProgramCounter: return CPU::MOS6502::Register::ProgramCounter;
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case CSTestMachine6502RegisterLastOperationAddress: return CPU::MOS6502::Register::LastOperationAddress;
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case CSTestMachine6502RegisterFlags: return CPU::MOS6502::Register::Flags;
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case CSTestMachine6502RegisterA: return CPU::MOS6502::Register::A;
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case CSTestMachine6502RegisterX: return CPU::MOS6502::Register::X;
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case CSTestMachine6502RegisterY: return CPU::MOS6502::Register::Y;
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2020-04-15 03:51:45 +00:00
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case CSTestMachine6502RegisterStackPointer: return CPU::MOS6502::Register::StackPointer;
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2020-10-14 01:38:30 +00:00
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case CSTestMachine6502RegisterEmulationFlag: return CPU::MOS6502::Register::EmulationFlag;
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case CSTestMachine6502RegisterDataBank: return CPU::MOS6502::Register::DataBank;
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case CSTestMachine6502RegisterProgramBank: return CPU::MOS6502::Register::ProgramBank;
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case CSTestMachine6502RegisterDirect: return CPU::MOS6502::Register::Direct;
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2015-07-17 00:15:30 +00:00
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}
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}
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2017-05-17 02:05:42 +00:00
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#pragma mark - Test class
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2015-07-17 00:15:30 +00:00
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2017-05-17 02:05:42 +00:00
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@implementation CSTestMachine6502 {
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2017-06-04 01:22:16 +00:00
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CPU::MOS6502::AllRAMProcessor *_processor;
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2015-07-17 00:15:30 +00:00
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}
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2017-05-17 02:05:42 +00:00
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#pragma mark - Lifecycle
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2015-07-17 00:15:30 +00:00
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2020-09-27 02:31:50 +00:00
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- (instancetype)initWithProcessor:(CSTestMachine6502Processor)processor {
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2015-07-17 00:15:30 +00:00
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self = [super init];
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2016-04-25 02:32:24 +00:00
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if(self) {
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2020-09-27 02:31:50 +00:00
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switch(processor) {
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case CSTestMachine6502Processor6502:
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2020-09-29 01:35:46 +00:00
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_processor = CPU::MOS6502::AllRAMProcessor::Processor(CPU::MOS6502Esque::Type::T6502);
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2020-09-27 02:31:50 +00:00
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break;
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case CSTestMachine6502Processor65C02:
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2020-09-29 01:35:46 +00:00
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_processor = CPU::MOS6502::AllRAMProcessor::Processor(CPU::MOS6502Esque::Type::TWDC65C02);
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2020-09-27 02:31:50 +00:00
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break;
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2020-09-29 01:35:46 +00:00
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case CSTestMachine6502Processor65816:
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_processor = CPU::MOS6502::AllRAMProcessor::Processor(CPU::MOS6502Esque::Type::TWDC65816);
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2020-09-27 02:31:50 +00:00
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}
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2015-07-17 00:15:30 +00:00
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}
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return self;
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}
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- (void)dealloc {
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2017-06-04 01:22:16 +00:00
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delete _processor;
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2015-07-17 00:15:30 +00:00
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}
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2017-05-17 02:05:42 +00:00
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#pragma mark - Accessors
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2020-10-14 01:38:30 +00:00
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- (uint8_t)valueForAddress:(uint32_t)address {
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2017-05-17 02:05:42 +00:00
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uint8_t value;
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2017-06-04 01:22:16 +00:00
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_processor->get_data_at_address(address, 1, &value);
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2017-05-17 02:05:42 +00:00
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return value;
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}
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2020-10-14 01:38:30 +00:00
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- (void)setValue:(uint8_t)value forAddress:(uint32_t)address {
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2017-06-04 01:22:16 +00:00
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_processor->set_data_at_address(address, 1, &value);
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2017-05-17 02:05:42 +00:00
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}
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- (void)setValue:(uint16_t)value forRegister:(CSTestMachine6502Register)reg {
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2017-06-04 01:22:16 +00:00
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_processor->set_value_of_register(registerForRegister(reg), value);
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2017-05-17 02:05:42 +00:00
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}
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- (uint16_t)valueForRegister:(CSTestMachine6502Register)reg {
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2017-06-04 01:22:16 +00:00
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return _processor->get_value_of_register(registerForRegister(reg));
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2017-05-17 02:05:42 +00:00
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}
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2020-10-14 01:38:30 +00:00
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- (void)setData:(NSData *)data atAddress:(uint32_t)startAddress {
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2017-06-04 01:22:16 +00:00
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_processor->set_data_at_address(startAddress, data.length, (const uint8_t *)data.bytes);
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2017-05-17 02:05:42 +00:00
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}
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- (BOOL)isJammed {
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2017-06-04 01:22:16 +00:00
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return _processor->is_jammed();
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2017-05-17 02:05:42 +00:00
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}
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2015-08-13 00:06:56 +00:00
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- (uint32_t)timestamp {
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2019-10-30 02:36:29 +00:00
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return uint32_t(_processor->get_timestamp().as_integral());
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2015-08-13 00:06:56 +00:00
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}
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2016-06-29 01:29:43 +00:00
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- (void)setIrqLine:(BOOL)irqLine {
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_irqLine = irqLine;
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2017-06-04 01:22:16 +00:00
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_processor->set_irq_line(irqLine);
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2016-06-29 01:29:43 +00:00
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}
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- (void)setNmiLine:(BOOL)nmiLine {
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_nmiLine = nmiLine;
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2017-06-04 01:22:16 +00:00
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_processor->set_nmi_line(nmiLine);
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}
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- (CPU::AllRAMProcessor *)processor {
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return _processor;
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2016-06-29 01:29:43 +00:00
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}
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2017-05-17 02:05:42 +00:00
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#pragma mark - Actions
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- (void)runForNumberOfCycles:(int)cycles {
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2017-07-23 02:21:26 +00:00
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_processor->run_for(Cycles(cycles));
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2017-05-17 02:05:42 +00:00
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}
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2015-07-17 00:15:30 +00:00
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@end
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