2017-05-17 01:28:17 +00:00
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//
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// AllRAMProcessor.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 16/05/2017.
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2018-05-13 19:19:52 +00:00
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// Copyright 2017 Thomas Harte. All rights reserved.
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2017-05-17 01:28:17 +00:00
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//
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2024-01-17 04:34:46 +00:00
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#pragma once
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2017-05-17 01:28:17 +00:00
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#include <cstdint>
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2017-05-20 01:20:28 +00:00
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#include <set>
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2017-05-17 01:28:17 +00:00
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#include <vector>
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2017-07-28 00:17:13 +00:00
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#include "../ClockReceiver/ClockReceiver.hpp"
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2017-05-17 01:28:17 +00:00
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namespace CPU {
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class AllRAMProcessor {
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public:
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2017-11-11 20:28:40 +00:00
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AllRAMProcessor(std::size_t memory_size);
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2017-07-28 00:17:13 +00:00
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HalfCycles get_timestamp();
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2020-10-12 01:18:01 +00:00
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void set_data_at_address(size_t startAddress, size_t length, const uint8_t *data);
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void get_data_at_address(size_t startAddress, size_t length, uint8_t *data);
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2017-05-17 01:28:17 +00:00
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2017-05-20 01:20:28 +00:00
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class TrapHandler {
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public:
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virtual void processor_did_trap(AllRAMProcessor &, uint16_t address) = 0;
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};
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void set_trap_handler(TrapHandler *trap_handler);
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void add_trap_address(uint16_t address);
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2017-05-17 01:28:17 +00:00
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protected:
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std::vector<uint8_t> memory_;
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2017-07-28 00:17:13 +00:00
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HalfCycles timestamp_;
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2017-05-20 01:20:28 +00:00
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2017-06-01 22:28:34 +00:00
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inline void check_address_for_trap(uint16_t address) {
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2017-06-04 01:54:42 +00:00
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if(traps_[address]) {
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2017-06-01 22:28:34 +00:00
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trap_handler_->processor_did_trap(*this, address);
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}
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}
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2017-05-20 01:20:28 +00:00
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private:
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TrapHandler *trap_handler_;
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2017-06-04 01:54:42 +00:00
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std::vector<bool> traps_;
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2017-05-17 01:28:17 +00:00
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};
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}
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