2017-11-26 18:28:26 +00:00
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//
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// 9918.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 25/11/2017.
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// Copyright © 2017 Thomas Harte. All rights reserved.
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//
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2017-12-15 01:27:26 +00:00
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#ifndef TMS9918_hpp
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#define TMS9918_hpp
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2017-11-26 18:28:26 +00:00
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#include "../../Outputs/CRT/CRT.hpp"
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#include "../../ClockReceiver/ClockReceiver.hpp"
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2017-12-15 01:27:26 +00:00
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#include "Implementation/9918Base.hpp"
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2017-11-26 21:47:59 +00:00
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#include <cstdint>
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2017-11-26 18:28:26 +00:00
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namespace TI {
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2017-12-15 01:27:26 +00:00
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/*!
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Provides emulation of the TMS9918a, TMS9928 and TMS9929. Likely in the future to be the
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vessel for emulation of sufficiently close derivatives, such as the Master System VDP.
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The TMS9918 and descendants are video display generators that own their own RAM, making it
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accessible through an implicitly-timed register interface, and (depending on model) can generate
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PAL and NTSC component and composite video.
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These chips have only one non-on-demand interaction with the outside world: an interrupt line.
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See get_time_until_interrupt and get_interrupt_line for asynchronous operation options.
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*/
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class TMS9918: public TMS9918Base {
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public:
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enum Personality {
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2017-12-15 01:27:26 +00:00
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TMS9918A, // includes the 9928 and 9929; set TV standard and output device as desired.
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2017-11-26 18:28:26 +00:00
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};
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/*!
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Constructs an instance of the drive controller that behaves according to personality @c p.
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@param p The type of controller to emulate.
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*/
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TMS9918(Personality p);
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2017-11-29 02:10:30 +00:00
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enum TVStandard {
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2017-12-15 01:27:26 +00:00
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/*! i.e. 50Hz output at around 312.5 lines/field */
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PAL,
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/*! i.e. 60Hz output at around 262.5 lines/field */
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NTSC
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2017-11-29 02:10:30 +00:00
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};
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2017-12-15 01:27:26 +00:00
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/*! Sets the TV standard for this TMS, if that is hard-coded in hardware. */
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2017-11-29 02:10:30 +00:00
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void set_tv_standard(TVStandard standard);
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2017-12-15 01:27:26 +00:00
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/*! Provides the CRT this TMS is connected to. */
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2017-11-26 18:28:26 +00:00
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std::shared_ptr<Outputs::CRT::CRT> get_crt();
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/*!
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Runs the VCP for the number of cycles indicate; it is an implicit assumption of the code
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that the input clock rate is 3579545 Hz — the NTSC colour clock rate.
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*/
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2017-11-27 01:07:30 +00:00
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void run_for(const HalfCycles cycles);
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2017-11-26 18:28:26 +00:00
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2017-12-15 01:27:26 +00:00
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/*! Sets a register value. */
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2017-11-26 21:47:59 +00:00
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void set_register(int address, uint8_t value);
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/*! Gets a register value. */
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uint8_t get_register(int address);
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2017-12-10 04:08:07 +00:00
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/*!
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Returns the amount of time until get_interrupt_line would next return true if
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there are no interceding calls to set_register or get_register.
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If get_interrupt_line is true now, returns zero. If get_interrupt_line would
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never return true, returns -1.
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*/
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2017-11-30 01:31:55 +00:00
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HalfCycles get_time_until_interrupt();
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2017-12-10 04:08:07 +00:00
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/*!
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@returns @c true if the interrupt line is currently active; @c false otherwise.
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*/
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2017-11-30 01:31:55 +00:00
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bool get_interrupt_line();
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2017-11-26 18:28:26 +00:00
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};
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};
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2017-12-15 01:27:26 +00:00
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#endif /* TMS9918_hpp */
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