From 054e0af07132d0acac6208ea64052fac79158411 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Thu, 8 Oct 2020 16:55:45 -0400 Subject: [PATCH] Corrects RTS behaviour: the return address on the stack is off by one. Dormann's tests now proceed to a BRK. --- Processors/65816/Implementation/65816Implementation.hpp | 5 ++++- Processors/65816/Implementation/65816Storage.cpp | 4 ++-- Processors/65816/Implementation/65816Storage.hpp | 3 +++ 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 5c316b280..5028e97ac 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -455,6 +455,10 @@ template void Processor::run_for(const Cycles pc_ = data_buffer_.value; break; + case RTS: + pc_ = data_buffer_.value + 1; + break; + case JSL: program_bank_ = instruction_buffer_.value & 0xff0000; [[fallthrough]]; @@ -678,7 +682,6 @@ template void Processor::run_for(const Cycles } break; // TODO: - // PHK, // TRB, TSB, // REP, SEP, // XCE, XBA, diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index ac554f5e2..cb83334bc 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -661,7 +661,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CyclePull); // PCH target(CycleAccessStack); // IO - target(OperationPerform); // [JMP, to perform the RTS] + target(OperationPerform); // [RTS] } // 22i. Stack; s, RTL. @@ -812,7 +812,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x5e LSR a, x */ op(absolute_x_rmw, LSR); /* 0x5f EOR al, x */ op(absolute_long_x, EOR); - /* 0x60 RTS s */ op(stack_rts, JMPind); // [sic]; loads the PC from data as per an RTS. + /* 0x60 RTS s */ op(stack_rts, RTS); /* 0x61 ADC (d, x) */ op(direct_indexed_indirect, ADC); /* 0x62 PER s */ op(stack_per, NOP); /* 0x63 ADC d, s */ op(stack_relative, ADC); diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp index f16d36bb6..168cf2455 100644 --- a/Processors/65816/Implementation/65816Storage.hpp +++ b/Processors/65816/Implementation/65816Storage.hpp @@ -191,6 +191,9 @@ enum Operation: uint8_t { /// placing the old PC into the data buffer (and only the PC; PBR not included). JSL, + /// Loads the PC with the contents of the data buffer + 1. + RTS, + /// i.e. jump to vector. TODO: is this really distinct from JMP? I'm assuming so for now, /// as I assume the PBR is implicitly modified. But then is it just JML? We'll see. BRK,