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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-05 10:28:58 +00:00

Made attempt to connect sync detect and then apply appropriate windowing, posting bytes to the appropriate place.

This commit is contained in:
Thomas Harte 2016-07-31 18:29:44 -04:00
parent 198fbbedc7
commit 0945049cd3
2 changed files with 25 additions and 7 deletions

View File

@ -116,6 +116,14 @@ void Machine::mos6522_did_change_interrupt_status(void *mos6522)
void Machine::process_input_bit(int value, unsigned int cycles_since_index_hole) void Machine::process_input_bit(int value, unsigned int cycles_since_index_hole)
{ {
_shift_register = (_shift_register << 1) | value; _shift_register = (_shift_register << 1) | value;
_driveVIA.set_sync_detected((_shift_register & 0x3ff) == 0x3ff);
if((_shift_register & 0x7ff) == 0x7fe) _bit_window_offset = 0;
_bit_window_offset++;
if(_bit_window_offset == 8)
{
_driveVIA.set_data_input((uint8_t)_shift_register);
_bit_window_offset = 0;
}
} }
// the 1540 does not recognise index holes // the 1540 does not recognise index holes

View File

@ -106,7 +106,7 @@ class SerialPortVIA: public MOS::MOS6522<SerialPortVIA>, public MOS::MOS6522IRQD
Bit 3: LED control (TODO) Bit 3: LED control (TODO)
Bit 4: write protect photocell status (TODO) Bit 4: write protect photocell status (TODO)
Bits 5/6: write density (TODO) Bits 5/6: write density (TODO)
Bit 7: 0 if sync marks are currently being detected, 1 otherwise; Bit 7: 0 if sync marks are currently being detected, 1 otherwise.
... and Port A contains the byte most recently read from the disk or the byte next to write to the disk, depending on data direction. ... and Port A contains the byte most recently read from the disk or the byte next to write to the disk, depending on data direction.
@ -117,12 +117,19 @@ class DriveVIA: public MOS::MOS6522<DriveVIA>, public MOS::MOS6522IRQDelegate {
public: public:
using MOS6522IRQDelegate::set_interrupt_status; using MOS6522IRQDelegate::set_interrupt_status;
// write protect tab uncovered
DriveVIA() : _port_b(0xff), _port_a(0xff) {}
uint8_t get_port_input(Port port) { uint8_t get_port_input(Port port) {
if(port) return port ? _port_b : _port_a;
{ }
return 0xff; // imply not sync, write protect tab uncovered
} void set_sync_detected(bool sync_detected) {
return 0xff; _port_b = (_port_b & 0x7f) | (sync_detected ? 0x00 : 0x80);
}
void set_data_input(uint8_t value) {
_port_a = value;
} }
void set_port_output(Port port, uint8_t value, uint8_t direction_mask) { void set_port_output(Port port, uint8_t value, uint8_t direction_mask) {
@ -137,6 +144,9 @@ class DriveVIA: public MOS::MOS6522<DriveVIA>, public MOS::MOS6522IRQDelegate {
// } // }
} }
} }
private:
uint8_t _port_b, _port_a;
}; };
/*! /*!
@ -201,7 +211,7 @@ class Machine:
std::shared_ptr<Storage::Disk> _disk; std::shared_ptr<Storage::Disk> _disk;
int _shift_register; int _shift_register, _bit_window_offset;
virtual void process_input_bit(int value, unsigned int cycles_since_index_hole); virtual void process_input_bit(int value, unsigned int cycles_since_index_hole);
virtual void process_index_hole(); virtual void process_index_hole();
}; };