diff --git a/InstructionSets/x86/Implementation/PerformImplementation.hpp b/InstructionSets/x86/Implementation/PerformImplementation.hpp
index 2643aab21..dfee72060 100644
--- a/InstructionSets/x86/Implementation/PerformImplementation.hpp
+++ b/InstructionSets/x86/Implementation/PerformImplementation.hpp
@@ -715,6 +715,40 @@ void and_(IntT &destination, IntT source, Status &status) {
 	status.zero = status.parity = destination;
 }
 
+template <typename IntT>
+void or_(IntT &destination, IntT source, Status &status) {
+	/*
+		DEST ← DEST OR SRC;
+	*/
+	/*
+		The OF and CF flags are cleared; the SF, ZF, and PF flags are set according to the result.
+		The state of the AF flag is undefined.
+	*/
+	destination |= source;
+
+	status.overflow = 0;
+	status.carry = 0;
+	status.sign = destination & top_bit<IntT>();
+	status.zero = status.parity = destination;
+}
+
+template <typename IntT>
+void xor_(IntT &destination, IntT source, Status &status) {
+	/*
+		DEST ← DEST XOR SRC;
+	*/
+	/*
+		The OF and CF flags are cleared; the SF, ZF, and PF flags are set according to the result.
+		The state of the AF flag is undefined.
+	*/
+	destination ^= source;
+
+	status.overflow = 0;
+	status.carry = 0;
+	status.sign = destination & top_bit<IntT>();
+	status.zero = status.parity = destination;
+}
+
 template <typename IntT, typename RegistersT, typename FlowControllerT>
 inline void call_relative(IntT offset, RegistersT &registers, FlowControllerT &flow_controller) {
 	flow_controller.call(registers.ip() + offset);
@@ -908,6 +942,8 @@ template <
 		case Operation::DEC:	Primitive::dec(destination(), status);		break;
 
 		case Operation::AND:	Primitive::and_(destination(), source(), status);		break;
+		case Operation::OR:		Primitive::or_(destination(), source(), status);		break;
+		case Operation::XOR:	Primitive::xor_(destination(), source(), status);		break;
 
 		case Operation::CALLrel:
 			Primitive::call_relative(instruction.displacement(), registers, flow_controller);
diff --git a/OSBindings/Mac/Clock SignalTests/8088Tests.mm b/OSBindings/Mac/Clock SignalTests/8088Tests.mm
index 0c3134854..6c166c4fb 100644
--- a/OSBindings/Mac/Clock SignalTests/8088Tests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/8088Tests.mm	
@@ -340,22 +340,22 @@ struct FailedExecution {
 
 		// TODO: IN, OUT
 
-		@"70.json.gz",	// JO
-		@"71.json.gz",	// JNO
-		@"72.json.gz",	// JB
-		@"73.json.gz",	// JNB
-		@"74.json.gz",	// JZ
-		@"75.json.gz",	// JNZ
-		@"76.json.gz",	// JBE
-		@"77.json.gz",	// JNBE
-		@"78.json.gz",	// JS
-		@"79.json.gz",	// JNS
-		@"7A.json.gz",	// JP
-		@"7B.json.gz",	// JNP
-		@"7C.json.gz",	// JL
-		@"7D.json.gz",	// JNL
-		@"7E.json.gz",	// JLE
-		@"7F.json.gz",	// JNLE
+//		@"70.json.gz",	// JO
+//		@"71.json.gz",	// JNO
+//		@"72.json.gz",	// JB
+//		@"73.json.gz",	// JNB
+//		@"74.json.gz",	// JZ
+//		@"75.json.gz",	// JNZ
+//		@"76.json.gz",	// JBE
+//		@"77.json.gz",	// JNBE
+//		@"78.json.gz",	// JS
+//		@"79.json.gz",	// JNS
+//		@"7A.json.gz",	// JP
+//		@"7B.json.gz",	// JNP
+//		@"7C.json.gz",	// JL
+//		@"7D.json.gz",	// JNL
+//		@"7E.json.gz",	// JLE
+//		@"7F.json.gz",	// JNLE
 
 		// CALL
 /*		@"E8.json.gz",	@"FF.2.json.gz",
@@ -376,12 +376,21 @@ struct FailedExecution {
 		// TODO: LOOP, LOOPE, LOOPNE
 
 		// TODO: MOV
-		// TODO: NEG, NOT, OR, XOR
+		// TODO: NEG, NOT
 
 		// AND
 		@"20.json.gz",	@"21.json.gz",	@"22.json.gz",	@"23.json.gz",	@"24.json.gz",	@"25.json.gz",
 		@"80.4.json.gz", @"81.4.json.gz", @"83.4.json.gz",
+*/
+		// OR
+		@"08.json.gz",	@"09.json.gz",	@"0A.json.gz",	@"0B.json.gz",	@"0C.json.gz",	@"0D.json.gz",
+		@"80.1.json.gz", @"81.1.json.gz", @"83.1.json.gz",
 
+		// XOR
+		@"30.json.gz",	@"31.json.gz",	@"32.json.gz",	@"33.json.gz",	@"34.json.gz",	@"35.json.gz",
+		@"80.6.json.gz", @"81.6.json.gz", @"83.6.json.gz",
+
+/*
 		// NOP
 		@"90.json.gz",