From 0f7cb2fa5ad7ef042afb0320ae76a50f97964700 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Tue, 24 May 2022 15:47:47 -0400
Subject: [PATCH] Attempt to honour the trace flag.

---
 .../Implementation/68000Mk2Implementation.hpp     | 15 +++++++++++++--
 .../68000Mk2/Implementation/68000Mk2Storage.hpp   |  3 +++
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 54fe60b00..5220fab10 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -17,8 +17,6 @@
 namespace CPU {
 namespace MC68000Mk2 {
 
-// TODO: obeyance of the trace flag.
-
 /// States for the state machine which are named by
 /// me for their purpose rather than automatically by file position.
 /// These are negative to avoid ambiguity with the other group.
@@ -351,6 +349,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			status_.is_supervisor = true;
 			status_.interrupt_level = 7;
 			status_.trace_flag = 0;
+			should_trace_ = 0;
 			did_update_status();
 
 			SetupDataAccess(Microcycle::Read, Microcycle::SelectWord);
@@ -381,6 +380,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			status_.is_supervisor = true;
 			status_.trace_flag = 0;
 			status_.interrupt_level = 7;
+			should_trace_ = 0;
 			did_update_status();
 
 			SetupDataAccess(0, Microcycle::SelectWord);
@@ -450,6 +450,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			status_.is_supervisor = true;
 			status_.trace_flag = 0;
 			status_.interrupt_level = 7;
+			should_trace_ = 0;
 			did_update_status();
 
 			SetupDataAccess(0, Microcycle::SelectWord);
@@ -510,6 +511,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			status_.is_supervisor = true;
 			status_.trace_flag = 0;
 			status_.interrupt_level = captured_interrupt_level_;
+			should_trace_ = 0;
 			did_update_status();
 
 			// Prepare for stack activity.
@@ -572,6 +574,15 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 				MoveToStateSpecific(DoInterrupt);
 			}
 
+			// Potentially perform a trace.
+			if(should_trace_) {
+				exception_vector_ = InstructionSet::M68k::Exception::Trace;
+				MoveToStateSpecific(StandardException);
+			}
+
+			// Capture the current trace flag.
+			should_trace_ = status_.trace_flag;
+
 			// Read and decode an opcode.
 			opcode_ = prefetch_.high.w;
 			instruction_ = decoder_.decode(opcode_);
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
index 35674e088..2113dfd53 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
@@ -58,6 +58,9 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
 	/// Current input interrupt level.
 	int bus_interrupt_level_ = 0;
 
+	// Whether to trace at the end of this instruction.
+	InstructionSet::M68k::Status::FlagT should_trace_ = 0;
+
 	// I don't have great information on the 68000 interrupt latency; as a first
 	// guess, capture the bus interrupt level upon every prefetch, and use that for
 	// the inner-loop decision.