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Disables a couple of now-trustworthy LOGs.

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This commit is contained in:
Thomas Harte 2021-10-05 06:51:47 -07:00
parent 5463cd1ae3
commit 1180ad7662
2 changed files with 3 additions and 3 deletions
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2
Machines/Amiga/Amiga.cpp
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@ -127,7 +127,7 @@ class ConcreteMachine:
if(!(address & 0x2000)) chipset_.cia_b.write(reg, cycle.value8_high());
}
LOG("CIA " << (((address >> 12) & 3)^3) << " " << (cycle.operation & Microcycle::Read ? "read " : "write ") << std::dec << (reg & 0xf) << " of " << PADHEX(2) << +cycle.value8_low());
// LOG("CIA " << (((address >> 12) & 3)^3) << " " << (cycle.operation & Microcycle::Read ? "read " : "write ") << std::dec << (reg & 0xf) << " of " << PADHEX(2) << +cycle.value8_low());
} else if(address >= 0xdf'f000 && address <= 0xdf'f1be) {
chipset_.perform(cycle);
} else {

4
Machines/Amiga/Chipset.cpp
View File

@ -563,7 +563,7 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
case Write(0x09a):
ApplySetClear(interrupt_enable_);
update_interrupts();
LOG("Interrupt enable mask modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_enable_});
// LOG("Interrupt enable mask modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_enable_});
break;
case Read(0x01c):
cycle.set_value16(interrupt_enable_);
@ -757,7 +757,7 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
case Write(0x1a8): case Write(0x1aa): case Write(0x1ac): case Write(0x1ae):
case Write(0x1b0): case Write(0x1b2): case Write(0x1b4): case Write(0x1b6):
case Write(0x1b8): case Write(0x1ba): case Write(0x1bc): case Write(0x1be): {
LOG("Colour palette; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
// LOG("Colour palette; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
// Store once in regular, linear order.
const auto entry_address = (register_address - 0x180) >> 1;