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A stab in the dark: does the IOLC inhibit also affect vector fetches?
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@ -237,9 +237,10 @@ class ConcreteMachine:
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static uint64_t total = 0;
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static uint64_t total = 0;
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bool is_1Mhz = false;
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bool is_1Mhz = false;
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if(operation == CPU::WDC65816::BusOperation::ReadVector) {
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if(operation == CPU::WDC65816::BusOperation::ReadVector && !(memory_.get_shadow_register()&0x40)) {
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// I think vector pulls always go to ROM?
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// I think vector pulls always go to ROM?
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// That's slightly implied in the documentation, and doing so makes GS/OS boot, so...
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// That's slightly implied in the documentation, and doing so makes GS/OS boot, so...
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// TODO: but is my guess above re: not doing that if IOLC shadowing is disabled correct?
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*value = rom_[rom_.size() - 65536 + address];
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*value = rom_[rom_.size() - 65536 + address];
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} else if(region.flags & MemoryMap::Region::IsIO) {
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} else if(region.flags & MemoryMap::Region::IsIO) {
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// Ensure classic auxiliary and language card accesses have effect.
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// Ensure classic auxiliary and language card accesses have effect.
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@ -789,7 +790,8 @@ class ConcreteMachine:
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// operation == CPU::WDC65816::BusOperation::ReadOpcode ? " [*]" : "");
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// operation == CPU::WDC65816::BusOperation::ReadOpcode ? " [*]" : "");
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// }
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// }
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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log = (address >= 0xff6cdc) && (address < 0xff6d43);
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// log = (address >= 0xff6cdc) && (address < 0xff6d43);
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log = (address >= 0x00d300) && (address < 0x00d600);
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}
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}
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// log &= !((operation == CPU::WDC65816::BusOperation::ReadOpcode) && ((address < 0xff6a2c) || (address >= 0xff6a9c)));
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// log &= !((operation == CPU::WDC65816::BusOperation::ReadOpcode) && ((address < 0xff6a2c) || (address >= 0xff6a9c)));
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if(log) {
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if(log) {
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