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Fix MUL ambiguity.
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@ -408,13 +408,9 @@ struct OperationMapper {
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// page references are provided were more detailed versions of the
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// page references are provided were more detailed versions of the
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// decoding are depicted.
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// decoding are depicted.
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// Data processing; cf. p.17.
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if constexpr (((partial >> 26) & 0b11) == 0b00) {
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scheduler.template perform<i>(DataProcessing(instruction));
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return;
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}
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// Multiply and multiply-accumulate (MUL, MLA); cf. p.23.
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// Multiply and multiply-accumulate (MUL, MLA); cf. p.23.
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//
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// This usurps a potential data processing decoding, so needs priority.
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if constexpr (((partial >> 22) & 0b111'111) == 0b000'000) {
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if constexpr (((partial >> 22) & 0b111'111) == 0b000'000) {
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// This implementation provides only eight bits baked into the template parameters so
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// This implementation provides only eight bits baked into the template parameters so
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// an additional dynamic test is required to check whether this is really, really MUL or MLA.
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// an additional dynamic test is required to check whether this is really, really MUL or MLA.
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@ -424,6 +420,12 @@ struct OperationMapper {
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}
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}
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}
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}
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// Data processing; cf. p.17.
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if constexpr (((partial >> 26) & 0b11) == 0b00) {
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scheduler.template perform<i>(DataProcessing(instruction));
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return;
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}
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// Single data transfer (LDR, STR); cf. p.25.
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// Single data transfer (LDR, STR); cf. p.25.
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if constexpr (((partial >> 26) & 0b11) == 0b01) {
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if constexpr (((partial >> 26) & 0b11) == 0b01) {
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scheduler.template perform<i>(SingleDataTransfer(instruction));
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scheduler.template perform<i>(SingleDataTransfer(instruction));
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@ -702,7 +702,7 @@ class ConcreteMachine:
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static bool log = false;
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static bool log = false;
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if(log) {
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if(log) {
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logger.info().append("%08x: %08x [r14:%08x]", executor_.pc(), instruction, executor_.registers()[14]);
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logger.info().append("%08x: %08x [r0:%08x]", executor_.pc(), instruction, executor_.registers()[0]);
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}
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}
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InstructionSet::ARM::execute<arm_model>(instruction, executor_);
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InstructionSet::ARM::execute<arm_model>(instruction, executor_);
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}
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}
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