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Merge pull request #101 from TomHarte/CommaVid
Adds detection and emulation of the CommaVid paging scheme
This commit is contained in:
Thomas Harte
GitHub
commit
1625b9c7f9
@ -90,17 +90,20 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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uint16_t masked_address = address & 0x1fff;
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if(address&0x1000)
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{
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if(isReadOperation(operation) && (!uses_superchip_ || masked_address > 0x10ff)) {
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returnValue &= rom_pages_[(address >> 10)&3][address&1023];
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// check for a RAM access
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bool was_ram_access = false;
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if(has_ram_) {
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if(masked_address >= ram_write_start_ && masked_address < ram_.size() + ram_write_start_) {
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ram_[masked_address & ram_.size() - 1] = *value;
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was_ram_access = true;
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} else if(masked_address >= ram_read_start_ && masked_address < ram_.size() + ram_read_start_) {
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returnValue &= ram_[masked_address & ram_.size() - 1];
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was_ram_access = true;
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}
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}
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// check for a Super Chip RAM access
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if(uses_superchip_ && masked_address < 0x1100) {
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if(masked_address < 0x1080) {
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superchip_ram_[masked_address & 0x7f] = *value;
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} else {
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returnValue &= superchip_ram_[masked_address & 0x7f];
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}
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if(isReadOperation(operation) && !was_ram_access) {
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returnValue &= rom_pages_[(address >> 10)&3][address&1023];
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}
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}
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@ -277,7 +280,25 @@ void Machine::configure_as_target(const StaticAnalyser::Target &target)
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rom_pages_[2] = &rom_[2048 & romMask];
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rom_pages_[3] = &rom_[3072 & romMask];
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uses_superchip_ = target.atari.uses_superchip;
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switch(target.atari.paging_model)
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{
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default:
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if(target.atari.uses_superchip)
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{
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ram_.resize(128);
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has_ram_ = true;
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ram_write_start_ = 0x1000;
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ram_read_start_ = 0x1080;
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}
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break;
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case StaticAnalyser::Atari2600PagingModel::CommaVid:
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ram_.resize(1024);
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has_ram_ = true;
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ram_write_start_ = 0x1400;
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ram_read_start_ = 0x1000;
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break;
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}
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}
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#pragma mark - Audio and Video
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@ -61,8 +61,9 @@ class Machine:
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size_t rom_size_;
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// cartridge RAM expansion store
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uint8_t superchip_ram_[128];
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bool uses_superchip_;
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std::vector<uint8_t> ram_;
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uint16_t ram_write_start_, ram_read_start_;
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bool has_ram_;
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// the RIOT and TIA
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PIA mos6532_;
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@ -12,6 +12,120 @@
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using namespace StaticAnalyser::Atari;
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static void DeterminePagingFor2kCartridge(StaticAnalyser::Target &target, const Storage::Cartridge::Cartridge::Segment &segment)
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{
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// if this is a 2kb cartridge then it's definitely either unpaged or a CommaVid
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uint16_t entry_address, break_address;
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entry_address = ((uint16_t)(segment.data[0x7fc] | (segment.data[0x7fd] << 8))) & 0x1fff;
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break_address = ((uint16_t)(segment.data[0x7fe] | (segment.data[0x7ff] << 8))) & 0x1fff;
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// a CommaVid start address needs to be outside of its RAM
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if(entry_address < 0x1800 || break_address < 0x1800) return;
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std::function<size_t(uint16_t address)> high_location_mapper = [](uint16_t address) {
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address &= 0x1fff;
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return (size_t)(address - 0x1800);
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};
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std::function<size_t(uint16_t address)> full_range_mapper = [](uint16_t address) {
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if(!(address & 0x1000)) return (size_t)-1;
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return (size_t)(address & 0x7ff);
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};
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StaticAnalyser::MOS6502::Disassembly high_location_disassembly =
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StaticAnalyser::MOS6502::Disassemble(segment.data, high_location_mapper, {entry_address, break_address});
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// StaticAnalyser::MOS6502::Disassembly full_range_disassembly =
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// StaticAnalyser::MOS6502::Disassemble(segment.data, full_range_mapper, {entry_address, break_address});
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// if there are no subroutines in the top 2kb of memory then this isn't a CommaVid
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bool has_appropriate_subroutine_calls = false;
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bool has_inappropriate_subroutine_calls = false;
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for(uint16_t address : high_location_disassembly.internal_calls)
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{
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const uint16_t masked_address = address & 0x1fff;
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has_appropriate_subroutine_calls |= (masked_address >= 0x1800);
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has_inappropriate_subroutine_calls |= (masked_address < 0x1800);
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}
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// assumption here: a CommaVid will never branch into RAM. Possibly unsafe: if it won't then what's the RAM for?
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if(!has_appropriate_subroutine_calls || has_inappropriate_subroutine_calls) return;
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std::set<uint16_t> all_writes = high_location_disassembly.external_stores;
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all_writes.insert(high_location_disassembly.external_modifies.begin(), high_location_disassembly.external_modifies.end());
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// a CommaVid will use its RAM
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if(all_writes.empty()) return;
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bool has_appropriate_accesses = false;
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for(uint16_t address : all_writes)
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{
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const uint16_t masked_address = address & 0x1fff;
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if(masked_address >= 0x1400 && masked_address < 0x1800)
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{
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has_appropriate_accesses = true;
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break;
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}
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}
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// in desperation, accept any kind of store that looks likely to be intended for large amounts of memory
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bool has_wide_area_store = false;
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if(!has_appropriate_accesses)
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{
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for(std::map<uint16_t, StaticAnalyser::MOS6502::Instruction>::value_type &entry : high_location_disassembly.instructions_by_address)
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{
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if(entry.second.operation == StaticAnalyser::MOS6502::Instruction::STA)
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{
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has_wide_area_store |= entry.second.addressing_mode == StaticAnalyser::MOS6502::Instruction::Indirect;
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has_wide_area_store |= entry.second.addressing_mode == StaticAnalyser::MOS6502::Instruction::IndexedIndirectX;
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has_wide_area_store |= entry.second.addressing_mode == StaticAnalyser::MOS6502::Instruction::IndirectIndexedY;
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}
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}
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}
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// conclude that this is a CommaVid if it attempted to write something to the CommaVid RAM locations;
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// caveat: false positives aren't likely to be problematic; a false positive is a 2KB ROM that always addresses
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// itself so as to land in ROM even if mapped as a CommaVid and this code is on the fence as to whether it
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// attempts to modify itself but it probably doesn't
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if(has_appropriate_accesses || has_wide_area_store)
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target.atari.paging_model = StaticAnalyser::Atari2600PagingModel::CommaVid;
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}
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static void DeterminePagingForCartridge(StaticAnalyser::Target &target, const Storage::Cartridge::Cartridge::Segment &segment)
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{
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if(segment.data.size() == 2048)
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{
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DeterminePagingFor2kCartridge(target, segment);
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return;
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}
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uint16_t entry_address, break_address;
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entry_address = (uint16_t)(segment.data[0xffc] | (segment.data[0xffd] << 8));
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break_address = (uint16_t)(segment.data[0xffe] | (segment.data[0xfff] << 8));
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std::function<size_t(uint16_t address)> address_mapper = [](uint16_t address) {
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if(!(address & 0x1000)) return (size_t)-1;
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return (size_t)(address & 0xfff);
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};
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StaticAnalyser::MOS6502::Disassembly disassembly =
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StaticAnalyser::MOS6502::Disassemble(segment.data, address_mapper, {entry_address, break_address});
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// check for any sort of on-cartridge RAM; that might imply a Super Chip or else immediately tip the
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// hat that this is a CBS RAM+ cartridge
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if(!disassembly.internal_stores.empty())
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{
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bool writes_above_128 = false;
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for(uint16_t address : disassembly.internal_stores)
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{
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writes_above_128 |= ((address & 0x1fff) > 0x10ff) && ((address & 0x1fff) < 0x1200);
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}
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if(writes_above_128)
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target.atari.paging_model = StaticAnalyser::Atari2600PagingModel::CBSRamPlus;
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else
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target.atari.uses_superchip = true;
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}
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}
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void StaticAnalyser::Atari::AddTargets(
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const std::list<std::shared_ptr<Storage::Disk::Disk>> &disks,
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const std::list<std::shared_ptr<Storage::Tape::Tape>> &tapes,
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@ -33,37 +147,11 @@ void StaticAnalyser::Atari::AddTargets(
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if(!cartridges.empty())
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{
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const std::list<Storage::Cartridge::Cartridge::Segment> &segments = cartridges.front()->get_segments();
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if(segments.size() == 1)
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{
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uint16_t entry_address, break_address;
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const Storage::Cartridge::Cartridge::Segment &segment = segments.front();
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if(segment.data.size() < 4096)
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{
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entry_address = (uint16_t)(segment.data[0x7fc] | (segment.data[0x7fd] << 8));
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break_address = (uint16_t)(segment.data[0x7fe] | (segment.data[0x7ff] << 8));
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}
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else
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{
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entry_address = (uint16_t)(segment.data[0xffc] | (segment.data[0xffd] << 8));
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break_address = (uint16_t)(segment.data[0xffe] | (segment.data[0xfff] << 8));
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}
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StaticAnalyser::MOS6502::Disassembly disassembly =
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StaticAnalyser::MOS6502::Disassemble(segment.data, 0x1000, {entry_address, break_address}, 0x1fff);
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// check for any sort of on-cartridge RAM; that might imply a Super Chip or else immediately tip the
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// hat that this is a CBS RAM+ cartridge
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if(!disassembly.internal_stores.empty())
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{
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bool writes_above_128 = false;
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for(uint16_t address : disassembly.internal_stores)
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{
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writes_above_128 |= ((address & 0x1fff) > 0x10ff) && ((address & 0x1fff) < 0x1200);
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}
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if(writes_above_128)
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target.atari.paging_model = Atari2600PagingModel::CBSRamPlus;
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else
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target.atari.uses_superchip = true;
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}
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DeterminePagingForCartridge(target, segment);
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}
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}
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@ -16,17 +16,18 @@ struct PartialDisassembly {
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std::vector<uint16_t> remaining_entry_points;
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};
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static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<uint8_t> &memory, uint16_t start_address, uint16_t entry_point, uint16_t address_mask)
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static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<uint8_t> &memory, const std::function<size_t(uint16_t)> &address_mapper, uint16_t entry_point)
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{
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uint16_t address = entry_point & address_mask;
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disassembly.disassembly.internal_calls.insert(entry_point);
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uint16_t address = entry_point;
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while(1)
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{
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uint16_t local_address = address - start_address;
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size_t local_address = address_mapper(address);
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if(local_address >= memory.size()) return;
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struct Instruction instruction;
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instruction.address = address;
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address = (address + 1) & address_mask;
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address++;
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// get operation
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uint8_t operation = memory[local_address];
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@ -234,7 +235,7 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
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case Instruction::IndexedIndirectX: case Instruction::IndirectIndexedY:
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case Instruction::Relative:
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{
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uint16_t operand_address = address - start_address;
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size_t operand_address = address_mapper(address);
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if(operand_address >= memory.size()) return;
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address++;
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@ -246,11 +247,12 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
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case Instruction::Absolute: case Instruction::AbsoluteX: case Instruction::AbsoluteY:
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case Instruction::Indirect:
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{
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uint16_t operand_address = address - start_address;
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if(operand_address >= memory.size()-1) return;
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size_t low_operand_address = address_mapper(address);
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size_t high_operand_address = address_mapper(address + 1);
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if(low_operand_address >= memory.size() || high_operand_address >= memory.size()) return;
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address += 2;
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instruction.operand = memory[operand_address] | (uint16_t)(memory[operand_address + 1] << 8);
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instruction.operand = memory[low_operand_address] | (uint16_t)(memory[high_operand_address] << 8);
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}
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break;
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}
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@ -261,7 +263,8 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
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// TODO: something wider-ranging than this
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if(instruction.addressing_mode == Instruction::Absolute || instruction.addressing_mode == Instruction::ZeroPage)
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{
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bool is_external = (instruction.operand&address_mask) < start_address || (instruction.operand&address_mask) >= start_address + memory.size();
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size_t mapped_address = address_mapper(instruction.operand);
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bool is_external = mapped_address >= memory.size();
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switch(instruction.operation)
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{
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@ -296,23 +299,23 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
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if(instruction.operation == Instruction::BRK) return; // TODO: check whether IRQ vector is within memory range
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if(instruction.operation == Instruction::JSR)
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{
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disassembly.remaining_entry_points.push_back(instruction.operand & address_mask);
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disassembly.remaining_entry_points.push_back(instruction.operand);
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}
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if(instruction.operation == Instruction::JMP)
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{
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if(instruction.addressing_mode == Instruction::Absolute)
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disassembly.remaining_entry_points.push_back(instruction.operand & address_mask);
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disassembly.remaining_entry_points.push_back(instruction.operand);
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return;
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}
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if(instruction.addressing_mode == Instruction::Relative)
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{
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uint16_t destination = (uint16_t)(address + (int8_t)instruction.operand);
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disassembly.remaining_entry_points.push_back(destination & address_mask);
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disassembly.remaining_entry_points.push_back(destination);
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}
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}
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}
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Disassembly StaticAnalyser::MOS6502::Disassemble(const std::vector<uint8_t> &memory, uint16_t start_address, std::vector<uint16_t> entry_points, uint16_t address_mask)
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Disassembly StaticAnalyser::MOS6502::Disassemble(const std::vector<uint8_t> &memory, const std::function<size_t(uint16_t)> &address_mapper, std::vector<uint16_t> entry_points)
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{
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PartialDisassembly partialDisassembly;
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partialDisassembly.remaining_entry_points = entry_points;
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@ -320,18 +323,26 @@ Disassembly StaticAnalyser::MOS6502::Disassemble(const std::vector<uint8_t> &mem
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while(!partialDisassembly.remaining_entry_points.empty())
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{
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// pull the next entry point from the back of the vector
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uint16_t next_entry_point = partialDisassembly.remaining_entry_points.back() & address_mask;
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uint16_t next_entry_point = partialDisassembly.remaining_entry_points.back();
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partialDisassembly.remaining_entry_points.pop_back();
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// if that address has already bene visited, forget about it
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if(partialDisassembly.disassembly.instructions_by_address.find(next_entry_point) != partialDisassembly.disassembly.instructions_by_address.end()) continue;
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// if it's outgoing, log it as such and forget about it; otherwise disassemble
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if(next_entry_point < start_address || next_entry_point >= start_address + memory.size())
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size_t mapped_entry_point = address_mapper(next_entry_point);
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if(mapped_entry_point >= memory.size())
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partialDisassembly.disassembly.outward_calls.insert(next_entry_point);
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else
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AddToDisassembly(partialDisassembly, memory, start_address, next_entry_point, address_mask);
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AddToDisassembly(partialDisassembly, memory, address_mapper, next_entry_point);
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}
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return std::move(partialDisassembly.disassembly);
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}
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std::function<size_t(uint16_t)> StaticAnalyser::MOS6502::OffsetMapper(uint16_t start_address)
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{
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return [start_address](uint16_t argument) {
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return (size_t)(argument - start_address);
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};
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}
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@ -10,10 +10,11 @@
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#define Disassembler6502_hpp
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#include <cstdint>
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#include <functional>
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#include <map>
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#include <memory>
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#include <set>
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#include <vector>
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#include <map>
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namespace StaticAnalyser {
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namespace MOS6502 {
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@ -64,11 +65,13 @@ struct Instruction {
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struct Disassembly {
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std::map<uint16_t, Instruction> instructions_by_address;
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std::set<uint16_t> outward_calls;
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std::set<uint16_t> internal_calls;
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std::set<uint16_t> external_stores, external_loads, external_modifies;
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std::set<uint16_t> internal_stores, internal_loads, internal_modifies;
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};
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Disassembly Disassemble(const std::vector<uint8_t> &memory, uint16_t start_address, std::vector<uint16_t> entry_points, uint16_t address_mask = 0xffff);
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Disassembly Disassemble(const std::vector<uint8_t> &memory, const std::function<size_t(uint16_t)> &address_mapper, std::vector<uint16_t> entry_points);
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std::function<size_t(uint16_t)> OffsetMapper(uint16_t start_address);
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}
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}
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@ -99,7 +99,7 @@ void StaticAnalyser::Oric::AddTargets(
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{
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std::vector<uint16_t> entry_points = {file.starting_address};
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StaticAnalyser::MOS6502::Disassembly disassembly =
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StaticAnalyser::MOS6502::Disassemble(file.data, file.starting_address, entry_points);
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StaticAnalyser::MOS6502::Disassemble(file.data, StaticAnalyser::MOS6502::OffsetMapper(file.starting_address), entry_points);
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int basic10_score = Basic10Score(disassembly);
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int basic11_score = Basic11Score(disassembly);
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|
||||
@ -27,6 +27,7 @@ enum class Vic20MemoryModel {
|
||||
|
||||
enum class Atari2600PagingModel {
|
||||
None,
|
||||
CommaVid,
|
||||
Atari8k,
|
||||
Atari16k,
|
||||
Atari32k,
|
||||
|
||||
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Reference in New Issue
Block a user