diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp
index 41b4d721c..24d597caa 100644
--- a/Processors/68000/Implementation/68000Implementation.hpp
+++ b/Processors/68000/Implementation/68000Implementation.hpp
@@ -58,6 +58,8 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
 //				}
 			}
 
+			// TODO: obey is_stopped_.
+
 			// Perform the microcycle.
 			remaining_duration -=
 				active_step_->microcycle.length +
@@ -1624,6 +1626,11 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
 									negative_flag_ = zero_result_ & 0x80000000;
 								break;
 
+								case Operation::STOP:
+									set_status(prefetch_queue_.halves.low.full);
+									is_stopped_ = true;
+								break;
+
 								/*
 									Development period debugging.
 								*/
diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp
index 6c33730d5..8b2dcaad3 100644
--- a/Processors/68000/Implementation/68000Storage.cpp
+++ b/Processors/68000/Implementation/68000Storage.cpp
@@ -464,6 +464,8 @@ struct ProcessorStorageConstructor {
 
 			LINK,						// Maps a register to a LINK.
 			UNLINK,						// Maps a register to an UNLINK.
+
+			STOP,						// Maps to a STOP.
 		};
 
 		using Operation = ProcessorStorage::Operation;
@@ -706,6 +708,8 @@ struct ProcessorStorageConstructor {
 
 			{0xfff8, 0x4e50, Operation::LINK, Decoder::LINK},			// 4-111 (p215)
 			{0xfff8, 0x4e58, Operation::UNLINK, Decoder::UNLINK},		// 4-194 (p298)
+
+			{0xffff, 0x4e72, Operation::STOP, Decoder::STOP},			// 6-85 (p539)
 		};
 
 		std::vector<size_t> micro_op_pointers(65536, std::numeric_limits<size_t>::max());
@@ -751,6 +755,12 @@ struct ProcessorStorageConstructor {
 #define inc(n) increment_action(is_long_word_access, is_byte_access, n)
 
 					switch(mapping.decoder) {
+						case Decoder::STOP: {
+							storage_.instructions[instruction].requires_supervisor = true;
+							op(Action::None, seq("n"));
+							op(Action::PerformOperation);
+						} break;
+
 						case Decoder::LINK: {
 							storage_.instructions[instruction].set_source(storage_, An, ea_register);
 							op(Action::PerformOperation, seq("np nW+ nw np", { ea(1), ea(1) }));
diff --git a/Processors/68000/Implementation/68000Storage.hpp b/Processors/68000/Implementation/68000Storage.hpp
index 4965a9ae7..3e598be6a 100644
--- a/Processors/68000/Implementation/68000Storage.hpp
+++ b/Processors/68000/Implementation/68000Storage.hpp
@@ -23,6 +23,8 @@ class ProcessorStorage {
 
 		RegisterPair32 prefetch_queue_;		// Each word will go into the low part of the word, then proceed upward.
 
+		bool is_stopped_ = false;
+
 		// Various status bits.
 		int is_supervisor_;
 		int interrupt_level_;
@@ -127,6 +129,8 @@ class ProcessorStorage {
 			EXTbtow,	EXTwtol,
 
 			LINK,	UNLINK,
+
+			STOP,
 		};
 
 		/*!