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It leads to a TODO, but implemented decoding and initial setup of STOPpages.
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@ -58,6 +58,8 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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// }
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}
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// TODO: obey is_stopped_.
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// Perform the microcycle.
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remaining_duration -=
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active_step_->microcycle.length +
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@ -1624,6 +1626,11 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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negative_flag_ = zero_result_ & 0x80000000;
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break;
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case Operation::STOP:
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set_status(prefetch_queue_.halves.low.full);
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is_stopped_ = true;
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break;
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/*
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Development period debugging.
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*/
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@ -464,6 +464,8 @@ struct ProcessorStorageConstructor {
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LINK, // Maps a register to a LINK.
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UNLINK, // Maps a register to an UNLINK.
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STOP, // Maps to a STOP.
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};
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using Operation = ProcessorStorage::Operation;
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@ -706,6 +708,8 @@ struct ProcessorStorageConstructor {
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{0xfff8, 0x4e50, Operation::LINK, Decoder::LINK}, // 4-111 (p215)
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{0xfff8, 0x4e58, Operation::UNLINK, Decoder::UNLINK}, // 4-194 (p298)
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{0xffff, 0x4e72, Operation::STOP, Decoder::STOP}, // 6-85 (p539)
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};
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std::vector<size_t> micro_op_pointers(65536, std::numeric_limits<size_t>::max());
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@ -751,6 +755,12 @@ struct ProcessorStorageConstructor {
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#define inc(n) increment_action(is_long_word_access, is_byte_access, n)
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switch(mapping.decoder) {
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case Decoder::STOP: {
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storage_.instructions[instruction].requires_supervisor = true;
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op(Action::None, seq("n"));
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op(Action::PerformOperation);
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} break;
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case Decoder::LINK: {
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storage_.instructions[instruction].set_source(storage_, An, ea_register);
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op(Action::PerformOperation, seq("np nW+ nw np", { ea(1), ea(1) }));
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@ -23,6 +23,8 @@ class ProcessorStorage {
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RegisterPair32 prefetch_queue_; // Each word will go into the low part of the word, then proceed upward.
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bool is_stopped_ = false;
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// Various status bits.
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int is_supervisor_;
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int interrupt_level_;
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@ -127,6 +129,8 @@ class ProcessorStorage {
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EXTbtow, EXTwtol,
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LINK, UNLINK,
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STOP,
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};
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/*!
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