diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 8c7b8bfb8..5d7f43f31 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -668,12 +668,12 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } // 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD and PLB. - static void stack_pld_plb(AccessType, bool, const std::function &target) { + static void stack_pld_plb(AccessType, bool is8bit, const std::function &target) { target(CycleFetchPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO. - target(CyclePullNotEmulation); // REG low. - target(CyclePullNotEmulation); // REG [high]. + if(!is8bit) target(CyclePullNotEmulation); // REG low. + target(CyclePullNotEmulation); // REG [high]. target(OperationPerform); } @@ -873,7 +873,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit); /* 0x29 AND # */ op(immediate, AND); /* 0x2a ROL A */ op(accumulator, ROL); - /* 0x2b PLD s */ op(stack_pld_plb, PLD); + /* 0x2b PLD s */ op(stack_pld_plb, PLD, AccessMode::Always16Bit); /* 0x2c BIT a */ op(absolute, BIT); /* 0x2d AND a */ op(absolute, AND); /* 0x2e ROL a */ op(absolute_rmw, ROL);