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Adds decoding of IWM accesses and respect for the ROM overlay bit.

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This commit is contained in:
Thomas Harte 2019-05-04 16:38:01 -04:00
parent bc9eb82e6f
commit 181b77c490
1 changed files with 63 additions and 34 deletions
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43
Machines/Apple/Macintosh/Macintosh.cpp
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@ -30,7 +30,8 @@ class ConcreteMachine:
ConcreteMachine(const ROMMachine::ROMFetcher &rom_fetcher) : ConcreteMachine(const ROMMachine::ROMFetcher &rom_fetcher) :
mc68000_(*this), mc68000_(*this),
video_(ram_.data()), video_(ram_.data()),
via_(via_port_handler_) { via_(via_port_handler_),
via_port_handler_(*this) {
// Grab a copy of the ROM and convert it into big-endian data. // Grab a copy of the ROM and convert it into big-endian data.
const auto roms = rom_fetcher("Macintosh", { "mac128k.rom" }); const auto roms = rom_fetcher("Macintosh", { "mac128k.rom" });
@ -76,18 +77,26 @@ class ConcreteMachine:
if(cycle.data_select_active()) { if(cycle.data_select_active()) {
printf("IO access to %06x: ", word_address << 1); printf("IO access to %06x: ", word_address << 1);
switch(word_address & 0x7ff0ff) {
case 0x77f0ff:
// VIA accesses are via address 0xefe1fe + register*512, // VIA accesses are via address 0xefe1fe + register*512,
// which at word precision is 0x77f0ff + register*256. // which at word precision is 0x77f0ff + register*256.
if((word_address & 0x77f0ff) == 0x77f0ff) { printf("VIA");
printf("VIA access ");
if(cycle.operation & Microcycle::Read) { if(cycle.operation & Microcycle::Read) {
cycle.value->halves.low = via_.get_register(word_address >> 8); cycle.value->halves.low = via_.get_register(word_address >> 8);
if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff; if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
} else { } else {
via_.set_register(word_address >> 8, cycle.value->halves.low); via_.set_register(word_address >> 8, cycle.value->halves.low);
} }
break;
case 0x6ff0ff:
// IWM
printf("IWM");
break;
} }
printf("\n"); printf("\n");
} }
} else { } else {
@ -163,9 +172,22 @@ class ConcreteMachine:
synchronous bus. synchronous bus.
*/ */
void set_rom_is_overlay(bool rom_is_overlay) {
ROM_is_overlay_ = rom_is_overlay;
}
private: private:
struct VIAPortHandler: public MOS::MOS6522::PortHandler { class VIAPortHandler: public MOS::MOS6522::PortHandler {
public:
VIAPortHandler(ConcreteMachine &machine) : machine_(machine) {}
void set_port_output(MOS::MOS6522::Port port, uint8_t value, uint8_t direction_mask) { void set_port_output(MOS::MOS6522::Port port, uint8_t value, uint8_t direction_mask) {
/*
Peripheral lines: keyboard data, interrupt configuration.
(See p176 [/215])
*/
switch(port) {
case MOS::MOS6522::Port::A:
/* /*
Port A: Port A:
b7: [input] SCC wait/request (/W/REQA and /W/REQB wired together for a logical OR) b7: [input] SCC wait/request (/W/REQA and /W/REQB wired together for a logical OR)
@ -174,7 +196,12 @@ class ConcreteMachine:
b4: 1 = use ROM overlay memory map, 0 = use ordinary memory map b4: 1 = use ROM overlay memory map, 0 = use ordinary memory map
b3: 0 = use alternate sound buffer, 1 = use ordinary sound buffer b3: 0 = use alternate sound buffer, 1 = use ordinary sound buffer
b2–b0: audio output volume b2–b0: audio output volume
*/
machine_.set_rom_is_overlay(!!(value & 0x10));
break;
case MOS::MOS6522::Port::B:
/*
Port B: Port B:
b7: 0 = sound enabled, 1 = sound disabled b7: 0 = sound enabled, 1 = sound disabled
b6: [input] 0 = video beam in visible portion of line, 1 = outside b6: [input] 0 = video beam in visible portion of line, 1 = outside
@ -184,11 +211,13 @@ class ConcreteMachine:
b2: 0 = real-time clock enabled, 1 = disabled b2: 0 = real-time clock enabled, 1 = disabled
b1: clock's data-clock line b1: clock's data-clock line
b0: clock's serial data line b0: clock's serial data line
Peripheral lines: keyboard data, interrupt configuration.
(See p176 [/215])
*/ */
break;
} }
}
private:
ConcreteMachine &machine_;
}; };