1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-19 08:31:11 +00:00

Fix address writeback.

This commit is contained in:
Thomas Harte 2022-05-06 09:56:01 -04:00
parent 607ddd2f78
commit 190a351a29

View File

@ -513,7 +513,7 @@ void Executor<model, BusHandler>::movem_toR(Preinstruction instruction, uint32_t
// [i]f the addressing register is also loaded from memory, the memory value is
// ignored and the register is written with the postincremented effective address."
registers_[8 + instruction.reg<1>()].l = source;
registers_[8 + instruction.reg<1>()].l = dest;
}
}