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https://github.com/TomHarte/CLK.git
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Reintroduces an empty second drive.
This prevents the uninitialised disk error. Which is a clue.
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parent
387be4a0a6
commit
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@ -8,7 +8,6 @@
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#include "IWM.hpp"
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#include "IWM.hpp"
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//#define NDEBUG
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#include "../../Outputs/Log.hpp"
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#include "../../Outputs/Log.hpp"
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using namespace Apple;
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using namespace Apple;
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@ -157,6 +156,11 @@ uint8_t IWM::read(int address) {
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sense = drives_[active_drive_] && (drives_[active_drive_]->get_head_count() == 1) ? 0 : 1;
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sense = drives_[active_drive_] && (drives_[active_drive_]->get_head_count() == 1) ? 0 : 1;
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break;
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break;
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case CA1|CA0:
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LOG("1|0 experimental)");
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sense = 0;
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break;
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case CA2|CA1|CA0: // "Present/HD" (per the Mac Plus ROM)
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case CA2|CA1|CA0: // "Present/HD" (per the Mac Plus ROM)
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// (0 = ??HD??)
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// (0 = ??HD??)
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LOG("present/HD)");
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LOG("present/HD)");
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@ -106,7 +106,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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// Attach the drives to the IWM.
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// Attach the drives to the IWM.
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iwm_.iwm.set_drive(0, &drives_[0]);
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iwm_.iwm.set_drive(0, &drives_[0]);
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// iwm_.iwm.set_drive(1, &drives_[1]);
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iwm_.iwm.set_drive(1, &drives_[1]);
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// The Mac runs at 7.8336mHz.
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// The Mac runs at 7.8336mHz.
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set_clock_rate(double(CLOCK_RATE));
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set_clock_rate(double(CLOCK_RATE));
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@ -180,6 +180,7 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::One, !video_.vsync());
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via_.set_control_line_input(MOS::MOS6522::Port::A, MOS::MOS6522::Line::One, !video_.vsync());
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// Update interrupt input. TODO: move this into a VIA/etc delegate callback?
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// Update interrupt input. TODO: move this into a VIA/etc delegate callback?
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// Double TODO: does this really cascade like this?
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if(scc_.get_interrupt_line()) {
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if(scc_.get_interrupt_line()) {
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mc68000_.set_interrupt_level(2);
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mc68000_.set_interrupt_level(2);
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} else if(via_.get_interrupt_line()) {
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} else if(via_.get_interrupt_line()) {
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@ -327,8 +328,11 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
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break;
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break;
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}
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}
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// if(!(operation & Microcycle::Read) && (word_address == (0x0000182e >> 1))) {
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// if(!(operation & Microcycle::Read) && (word_address == (0x00000172 >> 1))) {
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// printf("Write to 0000182e: %04x from %08x\n", cycle.value->full, mc68000_.get_state().program_counter);
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// if(operation & Microcycle::SelectByte)
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// printf("MBState: %02x\n", cycle.value->halves.low);
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// else
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// printf("MBState: %04x\n", cycle.value->full);
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// }
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// }
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// if(
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// if(
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// (
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// (
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