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Adds a sanity check.

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This commit is contained in:
Thomas Harte 2020-09-26 21:43:26 -04:00
parent e680022b1f
commit 1cd664ad85
2 changed files with 25 additions and 12 deletions
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20
Processors/65816/Implementation/65816Storage.cpp
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@ -7,6 +7,8 @@
//
#include "../65816.hpp"
#include <cassert>
#include <map>
using namespace CPU::WDC65816;
@ -94,15 +96,22 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
}
// Fill in the proper table entries and increment the opcode pointer.
storage_.instructions[opcode].program_offset = micro_op_location_8;
storage_.instructions[opcode].program_offset = uint16_t(micro_op_location_8);
storage_.instructions[opcode].operation = operation;
storage_.instructions[opcode + 256].program_offset = micro_op_location_16;
storage_.instructions[opcode + 256].program_offset = uint16_t(micro_op_location_16);
storage_.instructions[opcode + 256].operation = operation;
++opcode;
}
void set_exception_generator(Generator generator) {
const auto key = std::make_pair(AccessType::Read, generator);
const auto map_entry = installed_patterns.find(key);
storage_.instructions[512].program_offset = uint16_t(map_entry->second.first);
storage_.instructions[512].operation = BRK;
}
/*
Code below is structured to ease translation from Table 5-7 of the 2018
edition of the WDC 65816 datasheet.
@ -970,9 +979,12 @@ ProcessorStorage::ProcessorStorage() {
/* 0xfd SBC a, x */ op(absolute_x, SBC);
/* 0xfe INC a, x */ op(absolute_x_rmw, INC);
/* 0xff SBC al, x */ op(absolute_long_x, SBC);
#undef op
// TEMPORARY: for my interest. To be removed.
constructor.set_exception_generator(&ProcessorStorageConstructor::stack_exception);
#ifndef NDEBUG
assert(micro_ops_.size() < 65536);
printf("Generated %zd micro-ops in total; covered %d opcodes\n", micro_ops_.size(), constructor.opcode);
#endif
}

17
Processors/65816/Implementation/65816Storage.hpp
View File

@ -169,16 +169,17 @@ class ProcessorStorage {
public:
ProcessorStorage();
// Frustratingly, there is not quite enough space in 16 bits to store both
// the program offset and the operation as currently defined.
struct Instruction {
size_t program_offset;
uint16_t program_offset;
Operation operation;
};
Instruction instructions[512 + 3]; // Arranged as:
// 256 entries: emulation-mode instructions;
// 256 entries: 16-bit instructions;
// reset
// NMI
// IRQ
Instruction instructions[513]; // Arranged as:
// 256 entries: emulation-mode instructions;
// 256 entries: 16-bit instructions; and
// the entry for 'exceptions' (i.e. reset, irq, nmi).
private:
friend ProcessorStorageConstructor;
@ -188,7 +189,7 @@ class ProcessorStorage {
RegisterPair16 x_, y_;
uint16_t pc_, s_;
// Not
// I.e. the offset for direct addressing (outside of emulation mode).
uint16_t direct_;
// Banking registers are all stored with the relevant byte