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Adds a sanity check.
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@ -7,6 +7,8 @@
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//
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//
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#include "../65816.hpp"
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#include "../65816.hpp"
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#include <cassert>
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#include <map>
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#include <map>
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using namespace CPU::WDC65816;
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using namespace CPU::WDC65816;
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@ -94,15 +96,22 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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}
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}
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// Fill in the proper table entries and increment the opcode pointer.
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// Fill in the proper table entries and increment the opcode pointer.
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storage_.instructions[opcode].program_offset = micro_op_location_8;
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storage_.instructions[opcode].program_offset = uint16_t(micro_op_location_8);
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storage_.instructions[opcode].operation = operation;
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storage_.instructions[opcode].operation = operation;
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storage_.instructions[opcode + 256].program_offset = micro_op_location_16;
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storage_.instructions[opcode + 256].program_offset = uint16_t(micro_op_location_16);
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storage_.instructions[opcode + 256].operation = operation;
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storage_.instructions[opcode + 256].operation = operation;
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++opcode;
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++opcode;
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}
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}
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void set_exception_generator(Generator generator) {
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const auto key = std::make_pair(AccessType::Read, generator);
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const auto map_entry = installed_patterns.find(key);
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storage_.instructions[512].program_offset = uint16_t(map_entry->second.first);
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storage_.instructions[512].operation = BRK;
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}
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/*
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/*
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Code below is structured to ease translation from Table 5-7 of the 2018
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Code below is structured to ease translation from Table 5-7 of the 2018
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edition of the WDC 65816 datasheet.
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edition of the WDC 65816 datasheet.
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@ -970,9 +979,12 @@ ProcessorStorage::ProcessorStorage() {
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/* 0xfd SBC a, x */ op(absolute_x, SBC);
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/* 0xfd SBC a, x */ op(absolute_x, SBC);
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/* 0xfe INC a, x */ op(absolute_x_rmw, INC);
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/* 0xfe INC a, x */ op(absolute_x_rmw, INC);
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/* 0xff SBC al, x */ op(absolute_long_x, SBC);
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/* 0xff SBC al, x */ op(absolute_long_x, SBC);
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#undef op
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#undef op
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// TEMPORARY: for my interest. To be removed.
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constructor.set_exception_generator(&ProcessorStorageConstructor::stack_exception);
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#ifndef NDEBUG
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assert(micro_ops_.size() < 65536);
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printf("Generated %zd micro-ops in total; covered %d opcodes\n", micro_ops_.size(), constructor.opcode);
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printf("Generated %zd micro-ops in total; covered %d opcodes\n", micro_ops_.size(), constructor.opcode);
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#endif
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}
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}
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@ -169,16 +169,17 @@ class ProcessorStorage {
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public:
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public:
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ProcessorStorage();
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ProcessorStorage();
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// Frustratingly, there is not quite enough space in 16 bits to store both
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// the program offset and the operation as currently defined.
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struct Instruction {
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struct Instruction {
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size_t program_offset;
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uint16_t program_offset;
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Operation operation;
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Operation operation;
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};
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};
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Instruction instructions[512 + 3]; // Arranged as:
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Instruction instructions[513]; // Arranged as:
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// 256 entries: emulation-mode instructions;
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// 256 entries: emulation-mode instructions;
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// 256 entries: 16-bit instructions;
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// 256 entries: 16-bit instructions; and
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// reset
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// the entry for 'exceptions' (i.e. reset, irq, nmi).
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// NMI
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// IRQ
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private:
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private:
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friend ProcessorStorageConstructor;
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friend ProcessorStorageConstructor;
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@ -188,7 +189,7 @@ class ProcessorStorage {
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RegisterPair16 x_, y_;
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RegisterPair16 x_, y_;
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uint16_t pc_, s_;
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uint16_t pc_, s_;
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// Not
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// I.e. the offset for direct addressing (outside of emulation mode).
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uint16_t direct_;
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uint16_t direct_;
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// Banking registers are all stored with the relevant byte
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// Banking registers are all stored with the relevant byte
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