From 1defeca1ade29d13915d772ff6bda4bc73ad0042 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Fri, 6 May 2022 12:30:49 -0400 Subject: [PATCH] Implement RTS, RTR, RTE. --- InstructionSets/M68k/Executor.hpp | 3 +++ .../Implementation/ExecutorImplementation.hpp | 20 ++++++++++++++++ .../Implementation/PerformImplementation.hpp | 24 ++++++++----------- InstructionSets/M68k/Instruction.hpp | 1 + .../68000ComparativeTests.mm | 4 +++- 5 files changed, 37 insertions(+), 15 deletions(-) diff --git a/InstructionSets/M68k/Executor.hpp b/InstructionSets/M68k/Executor.hpp index c77ddecaf..6c35cde9b 100644 --- a/InstructionSets/M68k/Executor.hpp +++ b/InstructionSets/M68k/Executor.hpp @@ -55,6 +55,9 @@ template class Executor { template void movem_toR(Preinstruction instruction, uint32_t source, uint32_t dest); void pea(uint32_t address); void tas(Preinstruction instruction, uint32_t address); + void rtr(); + void rts(); + void rte(); // TODO: ownership of this shouldn't be here. struct Registers { diff --git a/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp b/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp index 96ee3ba00..5b232e632 100644 --- a/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp +++ b/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp @@ -401,6 +401,26 @@ void Executor::pea(uint32_t address) { bus_handler_.template write(sp().l, address); } +template +void Executor::rtr() { + status_.set_ccr(bus_handler_.template read(sp().l)); + sp().l += 2; + rts(); +} + +template +void Executor::rte() { + status_.set_status(bus_handler_.template read(sp().l)); + sp().l += 2; + rts(); +} + +template +void Executor::rts() { + program_counter_.l = bus_handler_.template read(sp().l); + sp().l += 4; +} + template void Executor::tas(Preinstruction instruction, uint32_t address) { uint8_t original_value; diff --git a/InstructionSets/M68k/Implementation/PerformImplementation.hpp b/InstructionSets/M68k/Implementation/PerformImplementation.hpp index b227d264f..2f98a4b4a 100644 --- a/InstructionSets/M68k/Implementation/PerformImplementation.hpp +++ b/InstructionSets/M68k/Implementation/PerformImplementation.hpp @@ -1204,21 +1204,17 @@ template < /* RTE and RTR share an implementation. */ -// case Operation::RTE_RTR: -// // If this is RTR, patch out the supervisor half of the status register. -// if(decoded_instruction_.l == 0x4e77) { -// const auto current_status = status(); -// source_bus_data_.halves.low.halves.high = -// uint8_t(current_status >> 8); -// } -// apply_status(source_bus_data_.l); -// break; + case Operation::RTR: + flow_controller.rtr(); + break; -// case Operation::RTE: -// break; -// -// case Operation::RTR: -// break; + case Operation::RTE: + flow_controller.rte(); + break; + + case Operation::RTS: + flow_controller.rts(); + break; /* TSTs: compare to zero. diff --git a/InstructionSets/M68k/Instruction.hpp b/InstructionSets/M68k/Instruction.hpp index d04dc373d..b189259a9 100644 --- a/InstructionSets/M68k/Instruction.hpp +++ b/InstructionSets/M68k/Instruction.hpp @@ -276,6 +276,7 @@ template uint8_t ope case Operation::MOVEMtoMw: case Operation::MOVEMtoMl: case Operation::MOVEMtoRw: case Operation::MOVEMtoRl: case Operation::TAS: + case Operation::RTR: case Operation::RTS: case Operation::RTE: return 0; // diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm index 8064e14b3..bb54dd6e5 100644 --- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm +++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm @@ -52,6 +52,8 @@ // swap // tas // tst +// rts +// rtr // Issues to fix: // @@ -81,7 +83,7 @@ - (void)setUp { // To limit tests run to a subset of files and/or of tests, uncomment and fill in below. - _fileSet = [NSSet setWithArray:@[@"rts.json", @"rtr.json"]]; +// _fileSet = [NSSet setWithArray:@[@"rts.json", @"rtr.json"]]; // _testSet = [NSSet setWithArray:@[@"NEGX 00c0"]]; // _fileSet = [NSSet setWithArray:@[@"jmp_jsr.json"]]; // _testSet = [NSSet setWithArray:@[@"CHK 41a8"]];