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Implement RTS, RTR, RTE.

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This commit is contained in:
Thomas Harte 2022-05-06 12:30:49 -04:00
parent ac6a9ab631
commit 1defeca1ad
5 changed files with 37 additions and 15 deletions
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3
InstructionSets/M68k/Executor.hpp
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@ -55,6 +55,9 @@ template <Model model, typename BusHandler> class Executor {
template <typename IntT> void movem_toR(Preinstruction instruction, uint32_t source, uint32_t dest); template <typename IntT> void movem_toR(Preinstruction instruction, uint32_t source, uint32_t dest);
void pea(uint32_t address); void pea(uint32_t address);
void tas(Preinstruction instruction, uint32_t address); void tas(Preinstruction instruction, uint32_t address);
void rtr();
void rts();
void rte();
// TODO: ownership of this shouldn't be here. // TODO: ownership of this shouldn't be here.
struct Registers { struct Registers {

20
InstructionSets/M68k/Implementation/ExecutorImplementation.hpp
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@ -401,6 +401,26 @@ void Executor<model, BusHandler>::pea(uint32_t address) {
bus_handler_.template write<uint32_t>(sp().l, address); bus_handler_.template write<uint32_t>(sp().l, address);
} }
template <Model model, typename BusHandler>
void Executor<model, BusHandler>::rtr() {
status_.set_ccr(bus_handler_.template read<uint16_t>(sp().l));
sp().l += 2;
rts();
}
template <Model model, typename BusHandler>
void Executor<model, BusHandler>::rte() {
status_.set_status(bus_handler_.template read<uint16_t>(sp().l));
sp().l += 2;
rts();
}
template <Model model, typename BusHandler>
void Executor<model, BusHandler>::rts() {
program_counter_.l = bus_handler_.template read<uint32_t>(sp().l);
sp().l += 4;
}
template <Model model, typename BusHandler> template <Model model, typename BusHandler>
void Executor<model, BusHandler>::tas(Preinstruction instruction, uint32_t address) { void Executor<model, BusHandler>::tas(Preinstruction instruction, uint32_t address) {
uint8_t original_value; uint8_t original_value;

24
InstructionSets/M68k/Implementation/PerformImplementation.hpp
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@ -1204,21 +1204,17 @@ template <
/* /*
RTE and RTR share an implementation. RTE and RTR share an implementation.
*/ */
// case Operation::RTE_RTR: case Operation::RTR:
// // If this is RTR, patch out the supervisor half of the status register. flow_controller.rtr();
// if(decoded_instruction_.l == 0x4e77) { break;
// const auto current_status = status();
// source_bus_data_.halves.low.halves.high =
// uint8_t(current_status >> 8);
// }
// apply_status(source_bus_data_.l);
// break;
// case Operation::RTE: case Operation::RTE:
// break; flow_controller.rte();
// break;
// case Operation::RTR:
// break; case Operation::RTS:
flow_controller.rts();
break;
/* /*
TSTs: compare to zero. TSTs: compare to zero.

1
InstructionSets/M68k/Instruction.hpp
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@ -276,6 +276,7 @@ template <Model model, Operation t_operation = Operation::Undefined> uint8_t ope
case Operation::MOVEMtoMw: case Operation::MOVEMtoMl: case Operation::MOVEMtoMw: case Operation::MOVEMtoMl:
case Operation::MOVEMtoRw: case Operation::MOVEMtoRl: case Operation::MOVEMtoRw: case Operation::MOVEMtoRl:
case Operation::TAS: case Operation::TAS:
case Operation::RTR: case Operation::RTS: case Operation::RTE:
return 0; return 0;
// //

4
OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
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@ -52,6 +52,8 @@
// swap // swap
// tas // tas
// tst // tst
// rts
// rtr
// Issues to fix: // Issues to fix:
// //
@ -81,7 +83,7 @@
- (void)setUp { - (void)setUp {
// To limit tests run to a subset of files and/or of tests, uncomment and fill in below. // To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
_fileSet = [NSSet setWithArray:@[@"rts.json", @"rtr.json"]]; // _fileSet = [NSSet setWithArray:@[@"rts.json", @"rtr.json"]];
// _testSet = [NSSet setWithArray:@[@"NEGX 00c0"]]; // _testSet = [NSSet setWithArray:@[@"NEGX 00c0"]];
// _fileSet = [NSSet setWithArray:@[@"jmp_jsr.json"]]; // _fileSet = [NSSet setWithArray:@[@"jmp_jsr.json"]];
// _testSet = [NSSet setWithArray:@[@"CHK 41a8"]]; // _testSet = [NSSet setWithArray:@[@"CHK 41a8"]];