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Permit MSX RAM mapper readback.
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parent
19d03dd4fd
commit
1f4d526ea5
@ -595,6 +595,13 @@ class ConcreteMachine:
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*cycle.value = clock_.read(next_clock_register_);
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*cycle.value = clock_.read(next_clock_register_);
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break;
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break;
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case 0xfc: case 0xfd: case 0xfe: case 0xff:
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if constexpr (model != Target::Model::MSX1) {
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*cycle.value = ram_mapper_[(address & 0xff) - 0xfc];
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break;
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}
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[[fallthrough]];
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default:
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default:
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// printf("Unhandled read %02x\n", address & 0xff);
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// printf("Unhandled read %02x\n", address & 0xff);
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*cycle.value = 0xff;
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*cycle.value = 0xff;
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@ -643,6 +650,8 @@ class ConcreteMachine:
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break;
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break;
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}
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}
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ram_mapper_[port - 0xfc] = *cycle.value;
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// Apply to RAM.
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// Apply to RAM.
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//
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//
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// On a real MSX this may also affect other slots.
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// On a real MSX this may also affect other slots.
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@ -877,6 +886,7 @@ class ConcreteMachine:
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// 8kb resolution is used by some cartride titles.
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// 8kb resolution is used by some cartride titles.
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const uint8_t *read_pointers_[8];
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const uint8_t *read_pointers_[8];
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uint8_t *write_pointers_[8];
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uint8_t *write_pointers_[8];
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uint8_t ram_mapper_[4]{};
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/// Optionally attaches non-default logic to any of the four things selectable
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/// Optionally attaches non-default logic to any of the four things selectable
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/// via the primary slot register.
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/// via the primary slot register.
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