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Starts introducing the Patrik Rak tests.
This commit is contained in:
Thomas Harte
parent
825b68e5c4
commit
2370575eb5
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@ -1012,6 +1012,9 @@ template <bool has_fdc> class ConcreteMachine:
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default: break;
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}
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// Check whether the interrupt signal has changed the other way.
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if(interrupt_timer_.request_has_changed()) z80_.set_interrupt_line(interrupt_timer_.get_request());
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// This implementation doesn't use time-stuffing; once in-phase waits won't be longer
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// than a single cycle so there's no real performance benefit to trying to find the
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// next non-wait when a wait cycle comes in, and there'd be no benefit to reproducing
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@ -1228,7 +1231,7 @@ template <bool has_fdc> class ConcreteMachine:
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KeyboardState key_state_;
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AmstradCPC::KeyboardMapper keyboard_mapper_;
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uint8_t ram_[128 * 1024];
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uint8_t ram_[1024 * 1024];
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};
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}
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@ -817,6 +817,8 @@
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4BD67DCC209BE4D700AB2146 /* StaticAnalyser.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCA209BE4D600AB2146 /* StaticAnalyser.cpp */; };
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4BD67DD0209BF27B00AB2146 /* Encoder.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCE209BF27B00AB2146 /* Encoder.cpp */; };
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4BD67DD1209BF27B00AB2146 /* Encoder.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCE209BF27B00AB2146 /* Encoder.cpp */; };
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4BD91D732401960C007BDC91 /* STX.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B7BA03323C58B1E00B98D9E /* STX.cpp */; };
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4BD91D772401C2B8007BDC91 /* PatrikRakTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */; };
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4BDA00DA22E60EE300AC3CD0 /* ROMRequester.xib in Resources */ = {isa = PBXBuildFile; fileRef = 4BDA00D922E60EE300AC3CD0 /* ROMRequester.xib */; };
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4BDA00DD22E622C200AC3CD0 /* ROMImages in Resources */ = {isa = PBXBuildFile; fileRef = 4BC9DF441D044FCA00F44158 /* ROMImages */; };
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4BDA00E022E644AF00AC3CD0 /* CSROMReceiverView.m in Sources */ = {isa = PBXBuildFile; fileRef = 4BDA00DF22E644AF00AC3CD0 /* CSROMReceiverView.m */; };
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@ -1696,6 +1698,7 @@
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4BD67DCE209BF27B00AB2146 /* Encoder.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Encoder.cpp; sourceTree = "<group>"; };
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4BD67DCF209BF27B00AB2146 /* Encoder.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Encoder.hpp; sourceTree = "<group>"; };
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4BD9137D1F311BC5009BCF85 /* i8255.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; name = i8255.hpp; path = 8255/i8255.hpp; sourceTree = "<group>"; };
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4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = PatrikRakTests.swift; sourceTree = "<group>"; };
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4BDA00D922E60EE300AC3CD0 /* ROMRequester.xib */ = {isa = PBXFileReference; lastKnownFileType = file.xib; path = ROMRequester.xib; sourceTree = "<group>"; };
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4BDA00DE22E644AF00AC3CD0 /* CSROMReceiverView.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = CSROMReceiverView.h; sourceTree = "<group>"; };
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4BDA00DF22E644AF00AC3CD0 /* CSROMReceiverView.m */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.objc; path = CSROMReceiverView.m; sourceTree = "<group>"; };
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@ -3316,6 +3319,7 @@
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4BEF6AAB1D35D1C400E73575 /* DPLLTests.swift */,
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4BBF49AE1ED2880200AB3669 /* FUSETests.swift */,
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4B1414611B58888700E04248 /* KlausDormannTests.swift */,
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4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */,
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4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */,
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4B08A2741EE35D56008B7065 /* Z80InterruptTests.swift */,
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4BDDBA981EF3451200347E61 /* Z80MachineCycleTests.swift */,
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@ -4643,6 +4647,7 @@
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4BEF6AAA1D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm in Sources */,
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4B778F3123A5F0CB0000D260 /* Keyboard.cpp in Sources */,
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4B778F4A23A5F1FB0000D260 /* StaticAnalyser.cpp in Sources */,
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4BD91D772401C2B8007BDC91 /* PatrikRakTests.swift in Sources */,
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4B680CE223A5553100451D43 /* 68000ComparativeTests.mm in Sources */,
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4B778F3723A5F11C0000D260 /* Parser.cpp in Sources */,
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4B778F4523A5F1CD0000D260 /* SegmentParser.cpp in Sources */,
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@ -4780,6 +4785,7 @@
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4B778F0223A5EBA40000D260 /* MFMSectorDump.cpp in Sources */,
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4BFCA1271ECBE33200AC40C1 /* TestMachineZ80.mm in Sources */,
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4B778F3E23A5F17C0000D260 /* IWM.cpp in Sources */,
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4BD91D732401960C007BDC91 /* STX.cpp in Sources */,
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4B778F1023A5EC5D0000D260 /* Drive.cpp in Sources */,
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4B9D0C4F22C7E0CF00DE1AD3 /* 68000RollShiftTests.mm in Sources */,
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);
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@ -67,7 +67,7 @@
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</Testables>
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</TestAction>
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<LaunchAction
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buildConfiguration = "Release"
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buildConfiguration = "Debug"
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selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
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selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
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enableASanStackUseAfterReturn = "YES"
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@ -0,0 +1,3 @@
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1.0 (7.12.2012)
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+ First release.
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@ -0,0 +1,19 @@
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Copyright (c) 2012 Patrik Rak (patrik@raxoft.cz)
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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@ -0,0 +1,28 @@
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Welcome to the Zilog Z80 CPU test suite.
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This set of programs is intended to help the emulator authors to reach the
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desired level of the CPU emulation authenticity. Each of the included programs
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performs an exhaustive computation using each of the tested Z80 instructions,
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compares the results with values obtained from a real 48K Spectrum with Zilog Z80 CPU,
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and reports any deviations detected.
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The following variants are available:
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- z80full - tests all flags and registers.
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- z80doc - tests all registers, but only officially documented flags.
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- z80flags - tests all flags, ignores registers.
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- z80docflags - tests documented flags only, ignores registers.
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- z80ccf - tests all flags after executing CCF after each instruction tested.
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- z80memptr - tests all flags after executing BIT N,(HL) after each instruction tested.
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The first four are the standard tests for CPU emulation. The CCF variant is
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used to thoroughly test the authentic SCF/CCF behavior after each Z80
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instruction. Finally the MEMPTR variant can be used to discover problems in
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the MEMPTR emulation - however note that the current set of test was not
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specifically designed to stress test MEMPTR, so many of the possible
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problems are very likely left undetected. I may eventually add specific
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MEMPTR tests in later releases.
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Enjoy!
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Patrik Rak
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@ -0,0 +1,34 @@
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# gmake
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NAME = z80test
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VERSION = 1.0
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PKG := $(NAME)-$(VERSION)
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PROGS := z80full z80flags z80doc z80docflags z80ccf z80memptr
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SRCS := main idea crctab tests testmacros print
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all: $(addsuffix .tap,$(PROGS))
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.DELETE_ON_ERROR: %.out
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%.out : %.asm $(addsuffix .asm,$(SRCS))
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sjasm $<
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%.tap : loader.bas %.out
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mktap -b $(basename $(word 2,$^)) 10 <$(word 1,$^) >$@
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mktap $(basename $(word 2,$^)) 32768 <$(word 2,$^) >>$@
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FILES := Makefile loader.bas $(addsuffix .asm,$(PROGS)) $(addsuffix .asm, $(SRCS))
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dist: all
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ln -s .. $(PKG)
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cp *.tap $(PKG)
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zip ../$(PKG).zip $(addprefix $(PKG)/src/, $(FILES)) $(PKG)/*.txt $(PKG)/*.tap
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rm $(PKG)/*.tap
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rm $(PKG)
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clean:
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rm -rf *.out *.lst *.tap
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tidy: clean
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rm -rf $(PROGS)
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1037
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm
Normal file
1037
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm
Normal file
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,291 @@
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; The Z80 tester.
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;
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; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
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;
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; This source code is released under the MIT license, see included license.txt.
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opsize equ 4+postccf ; Size of the tested instruction sequence.
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datasize equ 16 ; Size of the tested registers and data.
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vecsize equ opsize+datasize ; Size of entire test vector.
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test: ld (.spptr+1),sp
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if maskflags ; Keep mask for official flags.
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ld a,(hl)
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ld (.flagptr+1),a
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endif
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inc hl
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ld de,vector ; Init the test vector, counter and shifter.
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ld bc,vecsize
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call .copy
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add hl,bc
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call .copy
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call .copy
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add hl,bc
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ld (.valptr+1),de
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inc de
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call .clear
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ld (.maskptr+1),de
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xor a
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ld (de),a
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inc de
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call .copy
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ld a,0x07 ; Make sure we get 0
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out (0xfe),a ; on MIC bit when doing IN.
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ld a,0xa9 ; Set I,R,AF' to known values.
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ld i,a
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ld r,a
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or a
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ex af,af
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ld bc,65535 ; Init CRC.
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ld d,b
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ld e,c
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exx
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ld sp,data.regs
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; Test vector sequence combinator.
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.loop ld hl,counter
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ld de,shifter+1
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ld bc,vector
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macro combine base,count,offset:0,last:1
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repeat count
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ld a,(bc)
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xor (hl)
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ex de,hl
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xor (hl)
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ld (base+offset+@#),a
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if ( @# < count-1 ) | ! last
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inc c
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inc e
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inc l
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endif
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endrepeat
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endm
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ld a,(bc)
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xor (hl)
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ex de,hl
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xor (hl)
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cp 0x76 ; Skip halt.
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jp z,.next
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ld (.opcode),a
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inc c
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inc e
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inc l
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ld a,(bc)
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xor (hl)
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ex de,hl
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xor (hl)
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ld (.opcode+1),a
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cp 0x76 ; Skip halt...
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jp nz,.ok
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ld a,(.opcode)
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and 0xdf ; ... with IX/IY prefix.
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cp 0xdd
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jp z,.next
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.ok inc c
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inc e
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inc l
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combine .opcode,opsize-2,2,0
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combine data,datasize
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; The test itself.
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pop af
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pop bc
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pop de
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pop hl
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pop ix
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pop iy
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ld sp,(data.sp)
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.opcode ds opsize
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.continue
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if memptr
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ld hl,data
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bit 0,(hl)
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endif
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ld (data.sp),sp
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ld sp,data.regstop
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push iy
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push ix
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push hl
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push de
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push bc
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push af
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ld hl,data
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if maskflags
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ld a,(hl)
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.flagptr and 0xff
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if ! onlyflags
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ld (hl),a
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endif
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endif
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; CRC update.
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if ! onlyflags
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ld b,datasize
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endif
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if ! ( onlyflags & maskflags )
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.crcloop ld a,(hl)
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endif
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exx
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xor e
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ld l,a
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ld h,crctable/256
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ld a,(hl)
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xor d
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ld e,a
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inc h
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ld a,(hl)
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xor c
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ld d,a
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inc h
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ld a,(hl)
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xor b
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ld c,a
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inc h
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ld b,(hl)
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exx
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if ! onlyflags
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inc hl
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djnz .crcloop
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endif
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; Multibyte counter with arbitrary bit mask.
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.next ld hl,countmask
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ld de,counter
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ld b,vecsize
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.countloop ld a,(de)
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or a
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jr z,.countnext
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dec a
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and (hl)
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ld (de),a
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jp .loop
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.countnext ld a,(hl)
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ld (de),a
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inc l
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inc e
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djnz .countloop
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; Multibyte shifter with arbitrary bit mask.
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.maskptr ld hl,shiftmask
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.valptr ld de,shifter
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ld a,(de)
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add a,a
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neg
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add (hl)
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xor (hl)
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and (hl)
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ld (de),a
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jp nz,.loop
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.shiftloop inc l
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inc e
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ld a,e
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cp shiftend % 256
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jr z,.exit
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ld a,(hl)
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dec a
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xor (hl)
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and (hl)
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jr z,.shiftloop
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ld (de),a
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ld (.maskptr+1),hl
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ld (.valptr+1),de
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jp .loop
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.exit exx
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.spptr ld sp,0
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ret
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; Misc helper routines.
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.copy push hl
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push bc
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ldir
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pop bc
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pop hl
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ret
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.clear push hl
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push bc
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ld h,d
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ld l,e
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ld (hl),0
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inc de
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dec bc
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ldir
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pop bc
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pop hl
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ret
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align 256
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include crctab.asm
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; If this moves from 0x8800, all tests which use this address
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; will need to have their CRCs updated, so don't move it.
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align 256
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data
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.regs ds datasize-4
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.regstop
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.mem ds 2
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.sp ds 2
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.jump
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if postccf
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ccf
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else
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inc bc
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endif
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jp test.continue
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; This entire workspace must be kept within single 256 byte page.
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vector ds vecsize
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counter ds vecsize
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countmask ds vecsize
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shifter ds 1+vecsize
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shiftend
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shiftmask ds 1+vecsize
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; EOF ;
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@ -0,0 +1,2 @@
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10 CLEAR 32767:LOAD "" CODE:CLS
|
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20 RANDOMIZE USR 32768
|
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|
|
@ -0,0 +1,149 @@
|
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; Main driver for the Z80 tester.
|
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;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
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;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
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|
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org 0x8000
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|
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main: di
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push iy
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exx
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push hl
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call printinit
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|
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call print
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db "Z80 "
|
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testname
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db " test"
|
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db 23,32-13,1,127," 2012 RAXOFT",13,13,0
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ld bc,0
|
||||
ld hl,testtable
|
||||
jr .entry
|
||||
|
||||
.loop push hl
|
||||
push bc
|
||||
call .test
|
||||
pop bc
|
||||
pop hl
|
||||
|
||||
add a,b
|
||||
ld b,a
|
||||
|
||||
inc c
|
||||
|
||||
.entry ld e,(hl)
|
||||
inc hl
|
||||
ld d,(hl)
|
||||
inc hl
|
||||
|
||||
ld a,d
|
||||
or e
|
||||
jr nz,.loop
|
||||
|
||||
call print
|
||||
db 13,"Result: ",0
|
||||
|
||||
ld a,b
|
||||
or a
|
||||
jr z,.ok
|
||||
|
||||
call printdeca
|
||||
|
||||
call print
|
||||
db " of ",0
|
||||
|
||||
ld a,c
|
||||
call printdeca
|
||||
|
||||
call print
|
||||
db " tests failed.",13,0
|
||||
jr .done
|
||||
|
||||
.ok call print
|
||||
db "all tests passed.",13,0
|
||||
|
||||
.done pop hl
|
||||
exx
|
||||
pop iy
|
||||
ei
|
||||
ret
|
||||
|
||||
.test ld hl,1+3*vecsize
|
||||
add hl,de
|
||||
push hl
|
||||
|
||||
ld a,c
|
||||
call printdeca
|
||||
|
||||
ld a,' '
|
||||
call printchr
|
||||
|
||||
ld hl,1+3*vecsize+4
|
||||
add hl,de
|
||||
|
||||
call printhl
|
||||
|
||||
ex de,hl
|
||||
|
||||
call test
|
||||
|
||||
ld hl,data+3
|
||||
|
||||
ld (hl),e
|
||||
dec hl
|
||||
ld (hl),d
|
||||
dec hl
|
||||
ld (hl),c
|
||||
dec hl
|
||||
ld (hl),b
|
||||
|
||||
pop de
|
||||
|
||||
ld b,4
|
||||
call .cmp
|
||||
|
||||
jr nz,.mismatch
|
||||
|
||||
call print
|
||||
db 23,32-2,1,"OK",13,0
|
||||
|
||||
ret
|
||||
|
||||
.mismatch call print
|
||||
db 23,32-6,1,"FAILED",13
|
||||
db "CRC:",0
|
||||
|
||||
call printcrc
|
||||
|
||||
call print
|
||||
db " Expected:",0
|
||||
|
||||
ex de,hl
|
||||
call printcrc
|
||||
|
||||
ld a,13
|
||||
call printchr
|
||||
|
||||
ld a,1
|
||||
ret
|
||||
|
||||
.cmp push hl
|
||||
push de
|
||||
.cmploop ld a,(de)
|
||||
xor (hl)
|
||||
jr nz,.exit
|
||||
inc de
|
||||
inc hl
|
||||
djnz .cmploop
|
||||
.exit pop de
|
||||
pop hl
|
||||
ret
|
||||
|
||||
include print.asm
|
||||
include idea.asm
|
||||
include tests.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,82 @@
|
|||
; Simple printing module.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
|
||||
printinit: ld a,2
|
||||
jp 0x1601 ; CHAN-OPEN
|
||||
|
||||
|
||||
print: ex (sp),hl
|
||||
call printhl
|
||||
ex (sp),hl
|
||||
ret
|
||||
|
||||
printhl:
|
||||
.loop ld a,(hl)
|
||||
inc hl
|
||||
or a
|
||||
ret z
|
||||
call printchr
|
||||
jr .loop
|
||||
|
||||
|
||||
printdeca: ld h,a
|
||||
ld b,-100
|
||||
call .digit
|
||||
ld b,-10
|
||||
call .digit
|
||||
ld b,-1
|
||||
|
||||
.digit ld a,h
|
||||
ld l,'0'-1
|
||||
.loop inc l
|
||||
add a,b
|
||||
jr c,.loop
|
||||
sub b
|
||||
ld h,a
|
||||
ld a,l
|
||||
jr printchr
|
||||
|
||||
|
||||
printcrc: ld b,4
|
||||
|
||||
printhexs:
|
||||
.loop ld a,(hl)
|
||||
inc hl
|
||||
call printhexa
|
||||
djnz .loop
|
||||
ret
|
||||
|
||||
|
||||
printhexa: push af
|
||||
rrca
|
||||
rrca
|
||||
rrca
|
||||
rrca
|
||||
call .nibble
|
||||
pop af
|
||||
|
||||
.nibble or 0xf0
|
||||
daa
|
||||
add a,0xa0
|
||||
adc a,0x40
|
||||
|
||||
printchr: push iy
|
||||
ld iy,0x5c3a ; ERR-NR
|
||||
push de
|
||||
push bc
|
||||
exx
|
||||
ei
|
||||
; out (0xff),a
|
||||
rst 0x10
|
||||
di
|
||||
exx
|
||||
pop bc
|
||||
pop de
|
||||
pop iy
|
||||
ret
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
; Macros for defining the test vectors.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro db8 b7,b6,b5,b4,b3,b2,b1,b0
|
||||
db (b7<<7)|(b6<<6)|(b5<<5)|(b4<<4)|(b3<<3)|(b2<<2)|(b1<<1)|b0
|
||||
endm
|
||||
|
||||
macro ddbe n
|
||||
db (n>>24)&0xff
|
||||
db (n>>16)&0xff
|
||||
db (n>>8)&0xff
|
||||
db n&0xff
|
||||
endm
|
||||
|
||||
macro inst op1,op2,op3,op4,tail
|
||||
; Unfortunately, elseifidn doesn't seem to work properly.
|
||||
ifidn op4,stop
|
||||
db op1,op2,op3,tail,0
|
||||
else
|
||||
ifidn op3,stop
|
||||
db op1,op2,tail,op4,0
|
||||
else
|
||||
ifidn op2,stop
|
||||
db op1,tail,op3,op4,0
|
||||
else
|
||||
db op1,op2,op3,op4,tail
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
endm
|
||||
|
||||
macro flags sn,s,zn,z,f5n,f5,hcn,hc,f3n,f3,pvn,pv,nn,n,cn,c
|
||||
if maskflags
|
||||
db8 s,z,f5,hc,f3,pv,n,c
|
||||
else
|
||||
db 0xff
|
||||
endif
|
||||
endm
|
||||
|
||||
.veccount := 0
|
||||
|
||||
macro vec op1,op2,op3,op4,memn,mem,an,a,fn,f,bcn,bc,den,de,hln,hl,ixn,ix,iyn,iy,spn,sp
|
||||
|
||||
if postccf
|
||||
|
||||
if ( .@veccount % 3 ) == 0
|
||||
inst op1,op2,op3,op4,tail
|
||||
.@areg := 0
|
||||
else
|
||||
db op1,op2,op3,op4,0
|
||||
.@areg := .@areg | a
|
||||
endif
|
||||
|
||||
else
|
||||
db op1,op2,op3,op4
|
||||
endif
|
||||
|
||||
db f
|
||||
|
||||
if postccf & ( ( .veccount % 3 ) == 2 )
|
||||
db a | ( ( ~ .@areg ) & 0x28 )
|
||||
else
|
||||
db a
|
||||
endif
|
||||
|
||||
dw bc,de,hl,ix,iy
|
||||
dw mem
|
||||
dw sp
|
||||
|
||||
.@veccount := .@veccount+1
|
||||
|
||||
endm
|
||||
|
||||
macro crcs allflagsn,allflags,alln,all,docflagsn,docflags,docn,doc,ccfn,ccf,mptrn,mptr
|
||||
if postccf
|
||||
ddbe ccf
|
||||
elseif memptr
|
||||
ddbe mptr
|
||||
else
|
||||
if maskflags
|
||||
if onlyflags
|
||||
ddbe docflags
|
||||
else
|
||||
ddbe doc
|
||||
endif
|
||||
else
|
||||
if onlyflags
|
||||
ddbe allflags
|
||||
else
|
||||
ddbe all
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
endm
|
||||
|
||||
macro name n
|
||||
dz n
|
||||
endm
|
||||
|
||||
; EOF ;
|
||||
1379
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm
Normal file
1379
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm
Normal file
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,18 @@
|
|||
; Z80 test - post CCF version.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "CCF"
|
||||
endm
|
||||
|
||||
maskflags equ 0
|
||||
onlyflags equ 1
|
||||
postccf equ 1
|
||||
memptr equ 0
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
; Z80 test - officially documented flags version.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "doc"
|
||||
endm
|
||||
|
||||
maskflags equ 1
|
||||
onlyflags equ 0
|
||||
postccf equ 0
|
||||
memptr equ 0
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
; Z80 test - officially documented flags, flags only version.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "doc flags"
|
||||
endm
|
||||
|
||||
maskflags equ 1
|
||||
onlyflags equ 1
|
||||
postccf equ 0
|
||||
memptr equ 0
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
; Z80 test - flags only version.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "flags"
|
||||
endm
|
||||
|
||||
maskflags equ 0
|
||||
onlyflags equ 1
|
||||
postccf equ 0
|
||||
memptr equ 0
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
; Z80 test - the full version.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "full"
|
||||
endm
|
||||
|
||||
maskflags equ 0
|
||||
onlyflags equ 0
|
||||
postccf equ 0
|
||||
memptr equ 0
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
; Z80 test - MEMPTR version.
|
||||
;
|
||||
; However note that the current set of tests was not designed to stress test MEMPTR
|
||||
; particularly, so it doesn't detect much - I may eventually add such specific tests later.
|
||||
;
|
||||
; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz)
|
||||
;
|
||||
; This source code is released under the MIT license, see included license.txt.
|
||||
|
||||
macro testname
|
||||
db "MEMPTR"
|
||||
endm
|
||||
|
||||
maskflags equ 0
|
||||
onlyflags equ 1
|
||||
postccf equ 0
|
||||
memptr equ 1
|
||||
|
||||
include main.asm
|
||||
|
||||
; EOF ;
|
||||
BIN
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80ccf.tap
Normal file
BIN
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80ccf.tap
Normal file
Binary file not shown.
BIN
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80doc.tap
Normal file
BIN
OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80doc.tap
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
181
OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift
Normal file
181
OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift
Normal file
|
|
@ -0,0 +1,181 @@
|
|||
//
|
||||
// PatrikRakTests.swift
|
||||
// Clock Signal
|
||||
//
|
||||
// Created by Thomas Harte on 22/02/2020.
|
||||
// Copyright 2017 Thomas Harte. All rights reserved.
|
||||
//
|
||||
|
||||
import XCTest
|
||||
import Foundation
|
||||
|
||||
class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
|
||||
|
||||
fileprivate var done = false
|
||||
fileprivate var output = ""
|
||||
|
||||
private func runTest(_ name: String) {
|
||||
if let filename = Bundle(for: type(of: self)).path(forResource: name, ofType: "tap") {
|
||||
if let testData = try? Data(contentsOf: URL(fileURLWithPath: filename)) {
|
||||
|
||||
// Do a minor parsing of the TAP file to find the final file.
|
||||
var dataPointer = 0
|
||||
while dataPointer < testData.count {
|
||||
let blockSize = Int(testData[dataPointer]) + Int(testData[dataPointer+1]) << 8
|
||||
|
||||
dataPointer += 2 + blockSize
|
||||
break
|
||||
}
|
||||
|
||||
// Create a machine.
|
||||
let machine = CSTestMachineZ80()
|
||||
machine.setData(testData, atAddress: 0x0100)
|
||||
|
||||
// Add a RET and a trap at 10h, this is the Spectrum's system call for outputting text.
|
||||
machine.setValue(0xc9, atAddress: 0x0010)
|
||||
machine.addTrapAddress(0x0010);
|
||||
machine.trapHandler = self
|
||||
|
||||
// Add a call to $8000 and then an infinite loop; these tests load at $8000 and RET when done.
|
||||
machine.setValue(0xcd, atAddress: 0x7000)
|
||||
machine.setValue(0x00, atAddress: 0x7001)
|
||||
machine.setValue(0x80, atAddress: 0x7002)
|
||||
machine.setValue(0xc3, atAddress: 0x7003)
|
||||
machine.setValue(0x03, atAddress: 0x7004)
|
||||
machine.setValue(0x70, atAddress: 0x7005)
|
||||
|
||||
// seed execution at 0x7000
|
||||
machine.setValue(0x7000, for: .programCounter)
|
||||
|
||||
// run!
|
||||
let cyclesPerIteration: Int32 = 400_000_000
|
||||
var cyclesToDate: TimeInterval = 0
|
||||
let startDate = Date()
|
||||
var printDate = Date()
|
||||
let printMhz = false
|
||||
while !done {
|
||||
machine.runForNumber(ofCycles: cyclesPerIteration)
|
||||
cyclesToDate += TimeInterval(cyclesPerIteration)
|
||||
if printMhz && printDate.timeIntervalSinceNow < -5.0 {
|
||||
print("\(cyclesToDate / -startDate.timeIntervalSinceNow) Mhz")
|
||||
printDate = Date()
|
||||
}
|
||||
}
|
||||
|
||||
let targetOutput =
|
||||
"Z80doc instruction exerciser\n\r" +
|
||||
"<adc,sbc> hl,<bc,de,hl,sp>.... OK\n\r" +
|
||||
"add hl,<bc,de,hl,sp>.......... OK\n\r" +
|
||||
"add ix,<bc,de,ix,sp>.......... OK\n\r" +
|
||||
"add iy,<bc,de,iy,sp>.......... OK\n\r" +
|
||||
"aluop a,nn.................... OK\n\r" +
|
||||
"aluop a,<b,c,d,e,h,l,(hl),a>.. OK\n\r" +
|
||||
"aluop a,<ixh,ixl,iyh,iyl>..... OK\n\r" +
|
||||
"aluop a,(<ix,iy>+1)........... OK\n\r" +
|
||||
"bit n,(<ix,iy>+1)............. OK\n\r" +
|
||||
"bit n,<b,c,d,e,h,l,(hl),a>.... OK\n\r" +
|
||||
"cpd<r>........................ OK\n\r" +
|
||||
"cpi<r>........................ OK\n\r" +
|
||||
"<daa,cpl,scf,ccf>............. OK\n\r" +
|
||||
"<inc,dec> a................... OK\n\r" +
|
||||
"<inc,dec> b................... OK\n\r" +
|
||||
"<inc,dec> bc.................. OK\n\r" +
|
||||
"<inc,dec> c................... OK\n\r" +
|
||||
"<inc,dec> d................... OK\n\r" +
|
||||
"<inc,dec> de.................. OK\n\r" +
|
||||
"<inc,dec> e................... OK\n\r" +
|
||||
"<inc,dec> h................... OK\n\r" +
|
||||
"<inc,dec> hl.................. OK\n\r" +
|
||||
"<inc,dec> ix.................. OK\n\r" +
|
||||
"<inc,dec> iy.................. OK\n\r" +
|
||||
"<inc,dec> l................... OK\n\r" +
|
||||
"<inc,dec> (hl)................ OK\n\r" +
|
||||
"<inc,dec> sp.................. OK\n\r" +
|
||||
"<inc,dec> (<ix,iy>+1)......... OK\n\r" +
|
||||
"<inc,dec> ixh................. OK\n\r" +
|
||||
"<inc,dec> ixl................. OK\n\r" +
|
||||
"<inc,dec> iyh................. OK\n\r" +
|
||||
"<inc,dec> iyl................. OK\n\r" +
|
||||
"ld <bc,de>,(nnnn)............. OK\n\r" +
|
||||
"ld hl,(nnnn).................. OK\n\r" +
|
||||
"ld sp,(nnnn).................. OK\n\r" +
|
||||
"ld <ix,iy>,(nnnn)............. OK\n\r" +
|
||||
"ld (nnnn),<bc,de>............. OK\n\r" +
|
||||
"ld (nnnn),hl.................. OK\n\r" +
|
||||
"ld (nnnn),sp.................. OK\n\r" +
|
||||
"ld (nnnn),<ix,iy>............. OK\n\r" +
|
||||
"ld <bc,de,hl,sp>,nnnn......... OK\n\r" +
|
||||
"ld <ix,iy>,nnnn............... OK\n\r" +
|
||||
"ld a,<(bc),(de)>.............. OK\n\r" +
|
||||
"ld <b,c,d,e,h,l,(hl),a>,nn.... OK\n\r" +
|
||||
"ld (<ix,iy>+1),nn............. OK\n\r" +
|
||||
"ld <b,c,d,e>,(<ix,iy>+1)...... OK\n\r" +
|
||||
"ld <h,l>,(<ix,iy>+1).......... OK\n\r" +
|
||||
"ld a,(<ix,iy>+1).............. OK\n\r" +
|
||||
"ld <ixh,ixl,iyh,iyl>,nn....... OK\n\r" +
|
||||
"ld <bcdehla>,<bcdehla>........ OK\n\r" +
|
||||
"ld <bcdexya>,<bcdexya>........ OK\n\r" +
|
||||
"ld a,(nnnn) / ld (nnnn),a..... OK\n\r" +
|
||||
"ldd<r> (1).................... OK\n\r" +
|
||||
"ldd<r> (2).................... OK\n\r" +
|
||||
"ldi<r> (1).................... OK\n\r" +
|
||||
"ldi<r> (2).................... OK\n\r" +
|
||||
"neg........................... OK\n\r" +
|
||||
"<rrd,rld>..................... OK\n\r" +
|
||||
"<rlca,rrca,rla,rra>........... OK\n\r" +
|
||||
"shf/rot (<ix,iy>+1)........... OK\n\r" +
|
||||
"shf/rot <b,c,d,e,h,l,(hl),a>.. OK\n\r" +
|
||||
"<set,res> n,<bcdehl(hl)a>..... OK\n\r" +
|
||||
"<set,res> n,(<ix,iy>+1)....... OK\n\r" +
|
||||
"ld (<ix,iy>+1),<b,c,d,e>...... OK\n\r" +
|
||||
"ld (<ix,iy>+1),<h,l>.......... OK\n\r" +
|
||||
"ld (<ix,iy>+1),a.............. OK\n\r" +
|
||||
"ld (<bc,de>),a................ OK\n\r" +
|
||||
"Tests complete\n\r"
|
||||
XCTAssertEqual(targetOutput, output);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func testCCF() {
|
||||
runTest("z80ccf")
|
||||
}
|
||||
|
||||
func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) {
|
||||
let testMachineZ80 = testMachine as! CSTestMachineZ80
|
||||
switch address {
|
||||
case 0x0010:
|
||||
print("TODO")
|
||||
|
||||
let cRegister = testMachineZ80.value(for: .C)
|
||||
var textToAppend = ""
|
||||
switch cRegister {
|
||||
case 9:
|
||||
var address = testMachineZ80.value(for: .DE)
|
||||
var character: Character = " "
|
||||
while true {
|
||||
character = Character(UnicodeScalar(testMachineZ80.value(atAddress: address)))
|
||||
if character == "$" {
|
||||
break
|
||||
}
|
||||
textToAppend += String(character)
|
||||
address = address + 1
|
||||
}
|
||||
case 5:
|
||||
textToAppend = String(describing: UnicodeScalar(testMachineZ80.value(for: .E)))
|
||||
case 0:
|
||||
done = true
|
||||
default:
|
||||
break
|
||||
}
|
||||
output += textToAppend
|
||||
print(textToAppend)
|
||||
|
||||
case 0x7003:
|
||||
done = true
|
||||
|
||||
default:
|
||||
break
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user