From 2370575eb52b736bb96d956ea9b677fd1777e27c Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sat, 22 Feb 2020 15:49:36 -0500 Subject: [PATCH] Starts introducing the Patrik Rak tests. --- Machines/AmstradCPC/AmstradCPC.cpp | 5 +- .../Clock Signal.xcodeproj/project.pbxproj | 6 + .../xcschemes/Clock Signal.xcscheme | 2 +- .../Patrik Rak Z80 Tests/changes.txt | 3 + .../Patrik Rak Z80 Tests/license.txt | 19 + .../Patrik Rak Z80 Tests/readme.txt | 28 + .../Patrik Rak Z80 Tests/src/Makefile | 34 + .../Patrik Rak Z80 Tests/src/crctab.asm | 1037 +++++++++++++ .../Patrik Rak Z80 Tests/src/idea.asm | 291 ++++ .../Patrik Rak Z80 Tests/src/loader.bas | 2 + .../Patrik Rak Z80 Tests/src/main.asm | 149 ++ .../Patrik Rak Z80 Tests/src/print.asm | 82 + .../Patrik Rak Z80 Tests/src/testmacros.asm | 103 ++ .../Patrik Rak Z80 Tests/src/tests.asm | 1379 +++++++++++++++++ .../Patrik Rak Z80 Tests/src/z80ccf.asm | 18 + .../Patrik Rak Z80 Tests/src/z80doc.asm | 18 + .../Patrik Rak Z80 Tests/src/z80docflags.asm | 18 + .../Patrik Rak Z80 Tests/src/z80flags.asm | 18 + .../Patrik Rak Z80 Tests/src/z80full.asm | 18 + .../Patrik Rak Z80 Tests/src/z80memptr.asm | 21 + .../Patrik Rak Z80 Tests/z80ccf.tap | Bin 0 -> 14219 bytes .../Patrik Rak Z80 Tests/z80doc.tap | Bin 0 -> 13758 bytes .../Patrik Rak Z80 Tests/z80docflags.tap | Bin 0 -> 13758 bytes .../Patrik Rak Z80 Tests/z80flags.tap | Bin 0 -> 13758 bytes .../Patrik Rak Z80 Tests/z80full.tap | Bin 0 -> 13758 bytes .../Patrik Rak Z80 Tests/z80memptr.tap | Bin 0 -> 13758 bytes .../Clock SignalTests/PatrikRakTests.swift | 181 +++ 27 files changed, 3430 insertions(+), 2 deletions(-) create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/changes.txt create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/license.txt create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/readme.txt create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/Makefile create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/idea.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/loader.bas create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/main.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/print.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/testmacros.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80ccf.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80doc.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80docflags.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80flags.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80full.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80memptr.asm create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80ccf.tap create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80doc.tap create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80docflags.tap create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80flags.tap create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80full.tap create mode 100644 OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80memptr.tap create mode 100644 OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift diff --git a/Machines/AmstradCPC/AmstradCPC.cpp b/Machines/AmstradCPC/AmstradCPC.cpp index 99d248090..a6b4a2375 100644 --- a/Machines/AmstradCPC/AmstradCPC.cpp +++ b/Machines/AmstradCPC/AmstradCPC.cpp @@ -1012,6 +1012,9 @@ template class ConcreteMachine: default: break; } + // Check whether the interrupt signal has changed the other way. + if(interrupt_timer_.request_has_changed()) z80_.set_interrupt_line(interrupt_timer_.get_request()); + // This implementation doesn't use time-stuffing; once in-phase waits won't be longer // than a single cycle so there's no real performance benefit to trying to find the // next non-wait when a wait cycle comes in, and there'd be no benefit to reproducing @@ -1228,7 +1231,7 @@ template class ConcreteMachine: KeyboardState key_state_; AmstradCPC::KeyboardMapper keyboard_mapper_; - uint8_t ram_[128 * 1024]; + uint8_t ram_[1024 * 1024]; }; } diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj index 3763a8c49..9bf6104c7 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj +++ b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj @@ -817,6 +817,8 @@ 4BD67DCC209BE4D700AB2146 /* StaticAnalyser.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCA209BE4D600AB2146 /* StaticAnalyser.cpp */; }; 4BD67DD0209BF27B00AB2146 /* Encoder.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCE209BF27B00AB2146 /* Encoder.cpp */; }; 4BD67DD1209BF27B00AB2146 /* Encoder.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BD67DCE209BF27B00AB2146 /* Encoder.cpp */; }; + 4BD91D732401960C007BDC91 /* STX.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B7BA03323C58B1E00B98D9E /* STX.cpp */; }; + 4BD91D772401C2B8007BDC91 /* PatrikRakTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */; }; 4BDA00DA22E60EE300AC3CD0 /* ROMRequester.xib in Resources */ = {isa = PBXBuildFile; fileRef = 4BDA00D922E60EE300AC3CD0 /* ROMRequester.xib */; }; 4BDA00DD22E622C200AC3CD0 /* ROMImages in Resources */ = {isa = PBXBuildFile; fileRef = 4BC9DF441D044FCA00F44158 /* ROMImages */; }; 4BDA00E022E644AF00AC3CD0 /* CSROMReceiverView.m in Sources */ = {isa = PBXBuildFile; fileRef = 4BDA00DF22E644AF00AC3CD0 /* CSROMReceiverView.m */; }; @@ -1696,6 +1698,7 @@ 4BD67DCE209BF27B00AB2146 /* Encoder.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Encoder.cpp; sourceTree = ""; }; 4BD67DCF209BF27B00AB2146 /* Encoder.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Encoder.hpp; sourceTree = ""; }; 4BD9137D1F311BC5009BCF85 /* i8255.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; name = i8255.hpp; path = 8255/i8255.hpp; sourceTree = ""; }; + 4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = PatrikRakTests.swift; sourceTree = ""; }; 4BDA00D922E60EE300AC3CD0 /* ROMRequester.xib */ = {isa = PBXFileReference; lastKnownFileType = file.xib; path = ROMRequester.xib; sourceTree = ""; }; 4BDA00DE22E644AF00AC3CD0 /* CSROMReceiverView.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = CSROMReceiverView.h; sourceTree = ""; }; 4BDA00DF22E644AF00AC3CD0 /* CSROMReceiverView.m */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.objc; path = CSROMReceiverView.m; sourceTree = ""; }; @@ -3316,6 +3319,7 @@ 4BEF6AAB1D35D1C400E73575 /* DPLLTests.swift */, 4BBF49AE1ED2880200AB3669 /* FUSETests.swift */, 4B1414611B58888700E04248 /* KlausDormannTests.swift */, + 4BD91D762401C2B8007BDC91 /* PatrikRakTests.swift */, 4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */, 4B08A2741EE35D56008B7065 /* Z80InterruptTests.swift */, 4BDDBA981EF3451200347E61 /* Z80MachineCycleTests.swift */, @@ -4643,6 +4647,7 @@ 4BEF6AAA1D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm in Sources */, 4B778F3123A5F0CB0000D260 /* Keyboard.cpp in Sources */, 4B778F4A23A5F1FB0000D260 /* StaticAnalyser.cpp in Sources */, + 4BD91D772401C2B8007BDC91 /* PatrikRakTests.swift in Sources */, 4B680CE223A5553100451D43 /* 68000ComparativeTests.mm in Sources */, 4B778F3723A5F11C0000D260 /* Parser.cpp in Sources */, 4B778F4523A5F1CD0000D260 /* SegmentParser.cpp in Sources */, @@ -4780,6 +4785,7 @@ 4B778F0223A5EBA40000D260 /* MFMSectorDump.cpp in Sources */, 4BFCA1271ECBE33200AC40C1 /* TestMachineZ80.mm in Sources */, 4B778F3E23A5F17C0000D260 /* IWM.cpp in Sources */, + 4BD91D732401960C007BDC91 /* STX.cpp in Sources */, 4B778F1023A5EC5D0000D260 /* Drive.cpp in Sources */, 4B9D0C4F22C7E0CF00DE1AD3 /* 68000RollShiftTests.mm in Sources */, ); diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme index a99eb0a5d..63be2c037 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme +++ b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme @@ -67,7 +67,7 @@ $@ + mktap $(basename $(word 2,$^)) 32768 <$(word 2,$^) >>$@ + +FILES := Makefile loader.bas $(addsuffix .asm,$(PROGS)) $(addsuffix .asm, $(SRCS)) + +dist: all + ln -s .. $(PKG) + cp *.tap $(PKG) + zip ../$(PKG).zip $(addprefix $(PKG)/src/, $(FILES)) $(PKG)/*.txt $(PKG)/*.tap + rm $(PKG)/*.tap + rm $(PKG) + +clean: + rm -rf *.out *.lst *.tap + +tidy: clean + rm -rf $(PROGS) diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm new file mode 100644 index 000000000..4c397ce69 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/crctab.asm @@ -0,0 +1,1037 @@ +; CRC table for the standard 100000100110000010001110110110111 polynomial. +; Chunked little endian, the 256 LSBs first, the 256 MSBs last, for fast access. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + +crctable: + db 0x00 ; 00 00000000 + db 0x96 ; 01 77073096 + db 0x2c ; 02 ee0e612c + db 0xba ; 03 990951ba + db 0x19 ; 04 076dc419 + db 0x8f ; 05 706af48f + db 0x35 ; 06 e963a535 + db 0xa3 ; 07 9e6495a3 + db 0x32 ; 08 0edb8832 + db 0xa4 ; 09 79dcb8a4 + db 0x1e ; 0a e0d5e91e + db 0x88 ; 0b 97d2d988 + db 0x2b ; 0c 09b64c2b + db 0xbd ; 0d 7eb17cbd + db 0x07 ; 0e e7b82d07 + db 0x91 ; 0f 90bf1d91 + db 0x64 ; 10 1db71064 + db 0xf2 ; 11 6ab020f2 + db 0x48 ; 12 f3b97148 + db 0xde ; 13 84be41de + db 0x7d ; 14 1adad47d + db 0xeb ; 15 6ddde4eb + db 0x51 ; 16 f4d4b551 + db 0xc7 ; 17 83d385c7 + db 0x56 ; 18 136c9856 + db 0xc0 ; 19 646ba8c0 + db 0x7a ; 1a fd62f97a + db 0xec ; 1b 8a65c9ec + db 0x4f ; 1c 14015c4f + db 0xd9 ; 1d 63066cd9 + db 0x63 ; 1e fa0f3d63 + db 0xf5 ; 1f 8d080df5 + db 0xc8 ; 20 3b6e20c8 + db 0x5e ; 21 4c69105e + db 0xe4 ; 22 d56041e4 + db 0x72 ; 23 a2677172 + db 0xd1 ; 24 3c03e4d1 + db 0x47 ; 25 4b04d447 + db 0xfd ; 26 d20d85fd + db 0x6b ; 27 a50ab56b + db 0xfa ; 28 35b5a8fa + db 0x6c ; 29 42b2986c + db 0xd6 ; 2a dbbbc9d6 + db 0x40 ; 2b acbcf940 + db 0xe3 ; 2c 32d86ce3 + db 0x75 ; 2d 45df5c75 + db 0xcf ; 2e dcd60dcf + db 0x59 ; 2f abd13d59 + db 0xac ; 30 26d930ac + db 0x3a ; 31 51de003a + db 0x80 ; 32 c8d75180 + db 0x16 ; 33 bfd06116 + db 0xb5 ; 34 21b4f4b5 + db 0x23 ; 35 56b3c423 + db 0x99 ; 36 cfba9599 + db 0x0f ; 37 b8bda50f + db 0x9e ; 38 2802b89e + db 0x08 ; 39 5f058808 + db 0xb2 ; 3a c60cd9b2 + db 0x24 ; 3b b10be924 + db 0x87 ; 3c 2f6f7c87 + db 0x11 ; 3d 58684c11 + db 0xab ; 3e c1611dab + db 0x3d ; 3f b6662d3d + db 0x90 ; 40 76dc4190 + db 0x06 ; 41 01db7106 + db 0xbc ; 42 98d220bc + db 0x2a ; 43 efd5102a + db 0x89 ; 44 71b18589 + db 0x1f ; 45 06b6b51f + db 0xa5 ; 46 9fbfe4a5 + db 0x33 ; 47 e8b8d433 + db 0xa2 ; 48 7807c9a2 + db 0x34 ; 49 0f00f934 + db 0x8e ; 4a 9609a88e + db 0x18 ; 4b e10e9818 + db 0xbb ; 4c 7f6a0dbb + db 0x2d ; 4d 086d3d2d + db 0x97 ; 4e 91646c97 + db 0x01 ; 4f e6635c01 + db 0xf4 ; 50 6b6b51f4 + db 0x62 ; 51 1c6c6162 + db 0xd8 ; 52 856530d8 + db 0x4e ; 53 f262004e + db 0xed ; 54 6c0695ed + db 0x7b ; 55 1b01a57b + db 0xc1 ; 56 8208f4c1 + db 0x57 ; 57 f50fc457 + db 0xc6 ; 58 65b0d9c6 + db 0x50 ; 59 12b7e950 + db 0xea ; 5a 8bbeb8ea + db 0x7c ; 5b fcb9887c + db 0xdf ; 5c 62dd1ddf + db 0x49 ; 5d 15da2d49 + db 0xf3 ; 5e 8cd37cf3 + db 0x65 ; 5f fbd44c65 + db 0x58 ; 60 4db26158 + db 0xce ; 61 3ab551ce + db 0x74 ; 62 a3bc0074 + db 0xe2 ; 63 d4bb30e2 + db 0x41 ; 64 4adfa541 + db 0xd7 ; 65 3dd895d7 + db 0x6d ; 66 a4d1c46d + db 0xfb ; 67 d3d6f4fb + db 0x6a ; 68 4369e96a + db 0xfc ; 69 346ed9fc + db 0x46 ; 6a ad678846 + db 0xd0 ; 6b da60b8d0 + db 0x73 ; 6c 44042d73 + db 0xe5 ; 6d 33031de5 + db 0x5f ; 6e aa0a4c5f + db 0xc9 ; 6f dd0d7cc9 + db 0x3c ; 70 5005713c + db 0xaa ; 71 270241aa + db 0x10 ; 72 be0b1010 + db 0x86 ; 73 c90c2086 + db 0x25 ; 74 5768b525 + db 0xb3 ; 75 206f85b3 + db 0x09 ; 76 b966d409 + db 0x9f ; 77 ce61e49f + db 0x0e ; 78 5edef90e + db 0x98 ; 79 29d9c998 + db 0x22 ; 7a b0d09822 + db 0xb4 ; 7b c7d7a8b4 + db 0x17 ; 7c 59b33d17 + db 0x81 ; 7d 2eb40d81 + db 0x3b ; 7e b7bd5c3b + db 0xad ; 7f c0ba6cad + db 0x20 ; 80 edb88320 + db 0xb6 ; 81 9abfb3b6 + db 0x0c ; 82 03b6e20c + db 0x9a ; 83 74b1d29a + db 0x39 ; 84 ead54739 + db 0xaf ; 85 9dd277af + db 0x15 ; 86 04db2615 + db 0x83 ; 87 73dc1683 + db 0x12 ; 88 e3630b12 + db 0x84 ; 89 94643b84 + db 0x3e ; 8a 0d6d6a3e + db 0xa8 ; 8b 7a6a5aa8 + db 0x0b ; 8c e40ecf0b + db 0x9d ; 8d 9309ff9d + db 0x27 ; 8e 0a00ae27 + db 0xb1 ; 8f 7d079eb1 + db 0x44 ; 90 f00f9344 + db 0xd2 ; 91 8708a3d2 + db 0x68 ; 92 1e01f268 + db 0xfe ; 93 6906c2fe + db 0x5d ; 94 f762575d + db 0xcb ; 95 806567cb + db 0x71 ; 96 196c3671 + db 0xe7 ; 97 6e6b06e7 + db 0x76 ; 98 fed41b76 + db 0xe0 ; 99 89d32be0 + db 0x5a ; 9a 10da7a5a + db 0xcc ; 9b 67dd4acc + db 0x6f ; 9c f9b9df6f + db 0xf9 ; 9d 8ebeeff9 + db 0x43 ; 9e 17b7be43 + db 0xd5 ; 9f 60b08ed5 + db 0xe8 ; a0 d6d6a3e8 + db 0x7e ; a1 a1d1937e + db 0xc4 ; a2 38d8c2c4 + db 0x52 ; a3 4fdff252 + db 0xf1 ; a4 d1bb67f1 + db 0x67 ; a5 a6bc5767 + db 0xdd ; a6 3fb506dd + db 0x4b ; a7 48b2364b + db 0xda ; a8 d80d2bda + db 0x4c ; a9 af0a1b4c + db 0xf6 ; aa 36034af6 + db 0x60 ; ab 41047a60 + db 0xc3 ; ac df60efc3 + db 0x55 ; ad a867df55 + db 0xef ; ae 316e8eef + db 0x79 ; af 4669be79 + db 0x8c ; b0 cb61b38c + db 0x1a ; b1 bc66831a + db 0xa0 ; b2 256fd2a0 + db 0x36 ; b3 5268e236 + db 0x95 ; b4 cc0c7795 + db 0x03 ; b5 bb0b4703 + db 0xb9 ; b6 220216b9 + db 0x2f ; b7 5505262f + db 0xbe ; b8 c5ba3bbe + db 0x28 ; b9 b2bd0b28 + db 0x92 ; ba 2bb45a92 + db 0x04 ; bb 5cb36a04 + db 0xa7 ; bc c2d7ffa7 + db 0x31 ; bd b5d0cf31 + db 0x8b ; be 2cd99e8b + db 0x1d ; bf 5bdeae1d + db 0xb0 ; c0 9b64c2b0 + db 0x26 ; c1 ec63f226 + db 0x9c ; c2 756aa39c + db 0x0a ; c3 026d930a + db 0xa9 ; c4 9c0906a9 + db 0x3f ; c5 eb0e363f + db 0x85 ; c6 72076785 + db 0x13 ; c7 05005713 + db 0x82 ; c8 95bf4a82 + db 0x14 ; c9 e2b87a14 + db 0xae ; ca 7bb12bae + db 0x38 ; cb 0cb61b38 + db 0x9b ; cc 92d28e9b + db 0x0d ; cd e5d5be0d + db 0xb7 ; ce 7cdcefb7 + db 0x21 ; cf 0bdbdf21 + db 0xd4 ; d0 86d3d2d4 + db 0x42 ; d1 f1d4e242 + db 0xf8 ; d2 68ddb3f8 + db 0x6e ; d3 1fda836e + db 0xcd ; d4 81be16cd + db 0x5b ; d5 f6b9265b + db 0xe1 ; d6 6fb077e1 + db 0x77 ; d7 18b74777 + db 0xe6 ; d8 88085ae6 + db 0x70 ; d9 ff0f6a70 + db 0xca ; da 66063bca + db 0x5c ; db 11010b5c + db 0xff ; dc 8f659eff + db 0x69 ; dd f862ae69 + db 0xd3 ; de 616bffd3 + db 0x45 ; df 166ccf45 + db 0x78 ; e0 a00ae278 + db 0xee ; e1 d70dd2ee + db 0x54 ; e2 4e048354 + db 0xc2 ; e3 3903b3c2 + db 0x61 ; e4 a7672661 + db 0xf7 ; e5 d06016f7 + db 0x4d ; e6 4969474d + db 0xdb ; e7 3e6e77db + db 0x4a ; e8 aed16a4a + db 0xdc ; e9 d9d65adc + db 0x66 ; ea 40df0b66 + db 0xf0 ; eb 37d83bf0 + db 0x53 ; ec a9bcae53 + db 0xc5 ; ed debb9ec5 + db 0x7f ; ee 47b2cf7f + db 0xe9 ; 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11 6ab020f2 + db 0xf3 ; 12 f3b97148 + db 0x84 ; 13 84be41de + db 0x1a ; 14 1adad47d + db 0x6d ; 15 6ddde4eb + db 0xf4 ; 16 f4d4b551 + db 0x83 ; 17 83d385c7 + db 0x13 ; 18 136c9856 + db 0x64 ; 19 646ba8c0 + db 0xfd ; 1a fd62f97a + db 0x8a ; 1b 8a65c9ec + db 0x14 ; 1c 14015c4f + db 0x63 ; 1d 63066cd9 + db 0xfa ; 1e fa0f3d63 + db 0x8d ; 1f 8d080df5 + db 0x3b ; 20 3b6e20c8 + db 0x4c ; 21 4c69105e + db 0xd5 ; 22 d56041e4 + db 0xa2 ; 23 a2677172 + db 0x3c ; 24 3c03e4d1 + db 0x4b ; 25 4b04d447 + db 0xd2 ; 26 d20d85fd + db 0xa5 ; 27 a50ab56b + db 0x35 ; 28 35b5a8fa + db 0x42 ; 29 42b2986c + db 0xdb ; 2a dbbbc9d6 + db 0xac ; 2b acbcf940 + db 0x32 ; 2c 32d86ce3 + db 0x45 ; 2d 45df5c75 + db 0xdc ; 2e dcd60dcf + db 0xab ; 2f abd13d59 + db 0x26 ; 30 26d930ac + db 0x51 ; 31 51de003a + db 0xc8 ; 32 c8d75180 + db 0xbf ; 33 bfd06116 + db 0x21 ; 34 21b4f4b5 + db 0x56 ; 35 56b3c423 + db 0xcf ; 36 cfba9599 + db 0xb8 ; 37 b8bda50f + db 0x28 ; 38 2802b89e + db 0x5f ; 39 5f058808 + db 0xc6 ; 3a c60cd9b2 + db 0xb1 ; 3b b10be924 + db 0x2f ; 3c 2f6f7c87 + db 0x58 ; 3d 58684c11 + db 0xc1 ; 3e c1611dab + db 0xb6 ; 3f b6662d3d + db 0x76 ; 40 76dc4190 + db 0x01 ; 41 01db7106 + db 0x98 ; 42 98d220bc + db 0xef ; 43 efd5102a + db 0x71 ; 44 71b18589 + db 0x06 ; 45 06b6b51f + db 0x9f ; 46 9fbfe4a5 + db 0xe8 ; 47 e8b8d433 + db 0x78 ; 48 7807c9a2 + db 0x0f ; 49 0f00f934 + db 0x96 ; 4a 9609a88e + db 0xe1 ; 4b e10e9818 + db 0x7f ; 4c 7f6a0dbb + db 0x08 ; 4d 086d3d2d + db 0x91 ; 4e 91646c97 + db 0xe6 ; 4f e6635c01 + db 0x6b ; 50 6b6b51f4 + db 0x1c ; 51 1c6c6162 + db 0x85 ; 52 856530d8 + db 0xf2 ; 53 f262004e + db 0x6c ; 54 6c0695ed + db 0x1b ; 55 1b01a57b + db 0x82 ; 56 8208f4c1 + db 0xf5 ; 57 f50fc457 + db 0x65 ; 58 65b0d9c6 + db 0x12 ; 59 12b7e950 + db 0x8b ; 5a 8bbeb8ea + db 0xfc ; 5b fcb9887c + db 0x62 ; 5c 62dd1ddf + db 0x15 ; 5d 15da2d49 + db 0x8c ; 5e 8cd37cf3 + db 0xfb ; 5f fbd44c65 + db 0x4d ; 60 4db26158 + db 0x3a ; 61 3ab551ce + db 0xa3 ; 62 a3bc0074 + db 0xd4 ; 63 d4bb30e2 + db 0x4a ; 64 4adfa541 + db 0x3d ; 65 3dd895d7 + db 0xa4 ; 66 a4d1c46d + db 0xd3 ; 67 d3d6f4fb + db 0x43 ; 68 4369e96a + db 0x34 ; 69 346ed9fc + db 0xad ; 6a ad678846 + db 0xda ; 6b da60b8d0 + db 0x44 ; 6c 44042d73 + db 0x33 ; 6d 33031de5 + db 0xaa ; 6e aa0a4c5f + db 0xdd ; 6f dd0d7cc9 + db 0x50 ; 70 5005713c + db 0x27 ; 71 270241aa + db 0xbe ; 72 be0b1010 + db 0xc9 ; 73 c90c2086 + db 0x57 ; 74 5768b525 + db 0x20 ; 75 206f85b3 + db 0xb9 ; 76 b966d409 + db 0xce ; 77 ce61e49f + db 0x5e ; 78 5edef90e + db 0x29 ; 79 29d9c998 + db 0xb0 ; 7a b0d09822 + db 0xc7 ; 7b c7d7a8b4 + db 0x59 ; 7c 59b33d17 + db 0x2e ; 7d 2eb40d81 + db 0xb7 ; 7e b7bd5c3b + db 0xc0 ; 7f c0ba6cad + db 0xed ; 80 edb88320 + db 0x9a ; 81 9abfb3b6 + db 0x03 ; 82 03b6e20c + db 0x74 ; 83 74b1d29a + db 0xea ; 84 ead54739 + db 0x9d ; 85 9dd277af + db 0x04 ; 86 04db2615 + db 0x73 ; 87 73dc1683 + db 0xe3 ; 88 e3630b12 + db 0x94 ; 89 94643b84 + db 0x0d ; 8a 0d6d6a3e + db 0x7a ; 8b 7a6a5aa8 + db 0xe4 ; 8c e40ecf0b + db 0x93 ; 8d 9309ff9d + db 0x0a ; 8e 0a00ae27 + db 0x7d ; 8f 7d079eb1 + db 0xf0 ; 90 f00f9344 + db 0x87 ; 91 8708a3d2 + db 0x1e ; 92 1e01f268 + db 0x69 ; 93 6906c2fe + db 0xf7 ; 94 f762575d + db 0x80 ; 95 806567cb + db 0x19 ; 96 196c3671 + db 0x6e ; 97 6e6b06e7 + db 0xfe ; 98 fed41b76 + db 0x89 ; 99 89d32be0 + db 0x10 ; 9a 10da7a5a + db 0x67 ; 9b 67dd4acc + db 0xf9 ; 9c f9b9df6f + db 0x8e ; 9d 8ebeeff9 + db 0x17 ; 9e 17b7be43 + db 0x60 ; 9f 60b08ed5 + db 0xd6 ; a0 d6d6a3e8 + db 0xa1 ; a1 a1d1937e + db 0x38 ; a2 38d8c2c4 + db 0x4f ; a3 4fdff252 + db 0xd1 ; a4 d1bb67f1 + db 0xa6 ; a5 a6bc5767 + db 0x3f ; a6 3fb506dd + db 0x48 ; a7 48b2364b + db 0xd8 ; a8 d80d2bda + db 0xaf ; a9 af0a1b4c + db 0x36 ; aa 36034af6 + db 0x41 ; ab 41047a60 + db 0xdf ; ac df60efc3 + db 0xa8 ; ad a867df55 + db 0x31 ; ae 316e8eef + db 0x46 ; af 4669be79 + db 0xcb ; b0 cb61b38c + db 0xbc ; b1 bc66831a + db 0x25 ; b2 256fd2a0 + db 0x52 ; b3 5268e236 + db 0xcc ; b4 cc0c7795 + db 0xbb ; b5 bb0b4703 + db 0x22 ; b6 220216b9 + db 0x55 ; b7 5505262f + db 0xc5 ; b8 c5ba3bbe + db 0xb2 ; b9 b2bd0b28 + db 0x2b ; ba 2bb45a92 + db 0x5c ; bb 5cb36a04 + db 0xc2 ; bc c2d7ffa7 + db 0xb5 ; bd b5d0cf31 + db 0x2c ; be 2cd99e8b + db 0x5b ; bf 5bdeae1d + db 0x9b ; c0 9b64c2b0 + db 0xec ; c1 ec63f226 + db 0x75 ; c2 756aa39c + db 0x02 ; c3 026d930a + db 0x9c ; c4 9c0906a9 + db 0xeb ; c5 eb0e363f + db 0x72 ; c6 72076785 + db 0x05 ; c7 05005713 + db 0x95 ; c8 95bf4a82 + db 0xe2 ; c9 e2b87a14 + db 0x7b ; ca 7bb12bae + db 0x0c ; cb 0cb61b38 + db 0x92 ; cc 92d28e9b + db 0xe5 ; cd e5d5be0d + db 0x7c ; ce 7cdcefb7 + db 0x0b ; cf 0bdbdf21 + db 0x86 ; d0 86d3d2d4 + db 0xf1 ; d1 f1d4e242 + db 0x68 ; d2 68ddb3f8 + db 0x1f ; d3 1fda836e + db 0x81 ; d4 81be16cd + db 0xf6 ; d5 f6b9265b + db 0x6f ; d6 6fb077e1 + db 0x18 ; d7 18b74777 + db 0x88 ; d8 88085ae6 + db 0xff ; d9 ff0f6a70 + db 0x66 ; da 66063bca + db 0x11 ; db 11010b5c + db 0x8f ; dc 8f659eff + db 0xf8 ; dd f862ae69 + db 0x61 ; de 616bffd3 + db 0x16 ; df 166ccf45 + db 0xa0 ; e0 a00ae278 + db 0xd7 ; e1 d70dd2ee + db 0x4e ; e2 4e048354 + db 0x39 ; e3 3903b3c2 + db 0xa7 ; e4 a7672661 + db 0xd0 ; e5 d06016f7 + db 0x49 ; e6 4969474d + db 0x3e ; e7 3e6e77db + db 0xae ; e8 aed16a4a + db 0xd9 ; e9 d9d65adc + db 0x40 ; ea 40df0b66 + db 0x37 ; eb 37d83bf0 + db 0xa9 ; ec a9bcae53 + db 0xde ; ed debb9ec5 + db 0x47 ; ee 47b2cf7f + db 0x30 ; ef 30b5ffe9 + db 0xbd ; f0 bdbdf21c + db 0xca ; f1 cabac28a + db 0x53 ; f2 53b39330 + db 0x24 ; f3 24b4a3a6 + db 0xba ; f4 bad03605 + db 0xcd ; f5 cdd70693 + db 0x54 ; f6 54de5729 + db 0x23 ; f7 23d967bf + db 0xb3 ; f8 b3667a2e + db 0xc4 ; f9 c4614ab8 + db 0x5d ; fa 5d681b02 + db 0x2a ; fb 2a6f2b94 + db 0xb4 ; fc b40bbe37 + db 0xc3 ; fd c30c8ea1 + db 0x5a ; fe 5a05df1b + db 0x2d ; ff 2d02ef8d + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/idea.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/idea.asm new file mode 100644 index 000000000..89bc722f7 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/idea.asm @@ -0,0 +1,291 @@ +; The Z80 tester. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + +opsize equ 4+postccf ; Size of the tested instruction sequence. +datasize equ 16 ; Size of the tested registers and data. +vecsize equ opsize+datasize ; Size of entire test vector. + +test: ld (.spptr+1),sp + + if maskflags ; Keep mask for official flags. + ld a,(hl) + ld (.flagptr+1),a + endif + + inc hl + + ld de,vector ; Init the test vector, counter and shifter. + ld bc,vecsize + call .copy + + add hl,bc + + call .copy + + call .copy + + add hl,bc + + ld (.valptr+1),de + + inc de + + call .clear + + ld (.maskptr+1),de + + xor a + ld (de),a + inc de + + call .copy + + ld a,0x07 ; Make sure we get 0 + out (0xfe),a ; on MIC bit when doing IN. + + ld a,0xa9 ; Set I,R,AF' to known values. + ld i,a + ld r,a + or a + ex af,af + + ld bc,65535 ; Init CRC. + ld d,b + ld e,c + exx + + ld sp,data.regs + + ; Test vector sequence combinator. + +.loop ld hl,counter + ld de,shifter+1 + ld bc,vector + + macro combine base,count,offset:0,last:1 + repeat count + ld a,(bc) + xor (hl) + ex de,hl + xor (hl) + ld (base+offset+@#),a + if ( @# < count-1 ) | ! last + inc c + inc e + inc l + endif + endrepeat + endm + + ld a,(bc) + xor (hl) + ex de,hl + xor (hl) + cp 0x76 ; Skip halt. + jp z,.next + ld (.opcode),a + inc c + inc e + inc l + + ld a,(bc) + xor (hl) + ex de,hl + xor (hl) + ld (.opcode+1),a + cp 0x76 ; Skip halt... + jp nz,.ok + ld a,(.opcode) + and 0xdf ; ... with IX/IY prefix. + cp 0xdd + jp z,.next +.ok inc c + inc e + inc l + + combine .opcode,opsize-2,2,0 + combine data,datasize + + ; The test itself. + + pop af + pop bc + pop de + pop hl + pop ix + pop iy + ld sp,(data.sp) + +.opcode ds opsize +.continue + if memptr + ld hl,data + bit 0,(hl) + endif + + ld (data.sp),sp + ld sp,data.regstop + push iy + push ix + push hl + push de + push bc + push af + + ld hl,data + + if maskflags + ld a,(hl) +.flagptr and 0xff + + if ! onlyflags + ld (hl),a + endif + + endif + + ; CRC update. + + if ! onlyflags + ld b,datasize + endif + + if ! ( onlyflags & maskflags ) +.crcloop ld a,(hl) + endif + + exx + xor e + + ld l,a + ld h,crctable/256 + + ld a,(hl) + xor d + ld e,a + inc h + + ld a,(hl) + xor c + ld d,a + inc h + + ld a,(hl) + xor b + ld c,a + inc h + + ld b,(hl) + + exx + + if ! onlyflags + inc hl + djnz .crcloop + endif + + ; Multibyte counter with arbitrary bit mask. + +.next ld hl,countmask + ld de,counter + ld b,vecsize +.countloop ld a,(de) + or a + jr z,.countnext + dec a + and (hl) + ld (de),a + jp .loop +.countnext ld a,(hl) + ld (de),a + inc l + inc e + djnz .countloop + + ; Multibyte shifter with arbitrary bit mask. + +.maskptr ld hl,shiftmask +.valptr ld de,shifter + ld a,(de) + add a,a + neg + add (hl) + xor (hl) + and (hl) + ld (de),a + jp nz,.loop +.shiftloop inc l + inc e + ld a,e + cp shiftend % 256 + jr z,.exit + ld a,(hl) + dec a + xor (hl) + and (hl) + jr z,.shiftloop + ld (de),a + ld (.maskptr+1),hl + ld (.valptr+1),de + jp .loop + +.exit exx +.spptr ld sp,0 + ret + + ; Misc helper routines. + +.copy push hl + push bc + ldir + pop bc + pop hl + ret + +.clear push hl + push bc + ld h,d + ld l,e + ld (hl),0 + inc de + dec bc + ldir + pop bc + pop hl + ret + + align 256 + + include crctab.asm + +; If this moves from 0x8800, all tests which use this address +; will need to have their CRCs updated, so don't move it. + + align 256 +data +.regs ds datasize-4 +.regstop +.mem ds 2 +.sp ds 2 + +.jump + if postccf + ccf + else + inc bc + endif + jp test.continue + +; This entire workspace must be kept within single 256 byte page. + +vector ds vecsize +counter ds vecsize +countmask ds vecsize +shifter ds 1+vecsize +shiftend +shiftmask ds 1+vecsize + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/loader.bas b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/loader.bas new file mode 100644 index 000000000..a3f7fbe29 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/loader.bas @@ -0,0 +1,2 @@ + 10 CLEAR 32767:LOAD "" CODE:CLS + 20 RANDOMIZE USR 32768 diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/main.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/main.asm new file mode 100644 index 000000000..cb2833b05 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/main.asm @@ -0,0 +1,149 @@ +; Main driver for the Z80 tester. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + org 0x8000 + +main: di + push iy + exx + push hl + + call printinit + + call print + db "Z80 " + testname + db " test" + db 23,32-13,1,127," 2012 RAXOFT",13,13,0 + + ld bc,0 + ld hl,testtable + jr .entry + +.loop push hl + push bc + call .test + pop bc + pop hl + + add a,b + ld b,a + + inc c + +.entry ld e,(hl) + inc hl + ld d,(hl) + inc hl + + ld a,d + or e + jr nz,.loop + + call print + db 13,"Result: ",0 + + ld a,b + or a + jr z,.ok + + call printdeca + + call print + db " of ",0 + + ld a,c + call printdeca + + call print + db " tests failed.",13,0 + jr .done + +.ok call print + db "all tests passed.",13,0 + +.done pop hl + exx + pop iy + ei + ret + +.test ld hl,1+3*vecsize + add hl,de + push hl + + ld a,c + call printdeca + + ld a,' ' + call printchr + + ld hl,1+3*vecsize+4 + add hl,de + + call printhl + + ex de,hl + + call test + + ld hl,data+3 + + ld (hl),e + dec hl + ld (hl),d + dec hl + ld (hl),c + dec hl + ld (hl),b + + pop de + + ld b,4 + call .cmp + + jr nz,.mismatch + + call print + db 23,32-2,1,"OK",13,0 + + ret + +.mismatch call print + db 23,32-6,1,"FAILED",13 + db "CRC:",0 + + call printcrc + + call print + db " Expected:",0 + + ex de,hl + call printcrc + + ld a,13 + call printchr + + ld a,1 + ret + +.cmp push hl + push de +.cmploop ld a,(de) + xor (hl) + jr nz,.exit + inc de + inc hl + djnz .cmploop +.exit pop de + pop hl + ret + + include print.asm + include idea.asm + include tests.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/print.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/print.asm new file mode 100644 index 000000000..fe4c90cbd --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/print.asm @@ -0,0 +1,82 @@ +; Simple printing module. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + +printinit: ld a,2 + jp 0x1601 ; CHAN-OPEN + + +print: ex (sp),hl + call printhl + ex (sp),hl + ret + +printhl: +.loop ld a,(hl) + inc hl + or a + ret z + call printchr + jr .loop + + +printdeca: ld h,a + ld b,-100 + call .digit + ld b,-10 + call .digit + ld b,-1 + +.digit ld a,h + ld l,'0'-1 +.loop inc l + add a,b + jr c,.loop + sub b + ld h,a + ld a,l + jr printchr + + +printcrc: ld b,4 + +printhexs: +.loop ld a,(hl) + inc hl + call printhexa + djnz .loop + ret + + +printhexa: push af + rrca + rrca + rrca + rrca + call .nibble + pop af + +.nibble or 0xf0 + daa + add a,0xa0 + adc a,0x40 + +printchr: push iy + ld iy,0x5c3a ; ERR-NR + push de + push bc + exx + ei + ; out (0xff),a + rst 0x10 + di + exx + pop bc + pop de + pop iy + ret + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/testmacros.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/testmacros.asm new file mode 100644 index 000000000..92210bd31 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/testmacros.asm @@ -0,0 +1,103 @@ +; Macros for defining the test vectors. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro db8 b7,b6,b5,b4,b3,b2,b1,b0 + db (b7<<7)|(b6<<6)|(b5<<5)|(b4<<4)|(b3<<3)|(b2<<2)|(b1<<1)|b0 + endm + + macro ddbe n + db (n>>24)&0xff + db (n>>16)&0xff + db (n>>8)&0xff + db n&0xff + endm + + macro inst op1,op2,op3,op4,tail + ; Unfortunately, elseifidn doesn't seem to work properly. + ifidn op4,stop + db op1,op2,op3,tail,0 + else + ifidn op3,stop + db op1,op2,tail,op4,0 + else + ifidn op2,stop + db op1,tail,op3,op4,0 + else + db op1,op2,op3,op4,tail + endif + endif + endif + endm + + macro flags sn,s,zn,z,f5n,f5,hcn,hc,f3n,f3,pvn,pv,nn,n,cn,c + if maskflags + db8 s,z,f5,hc,f3,pv,n,c + else + db 0xff + endif + endm + +.veccount := 0 + + macro vec op1,op2,op3,op4,memn,mem,an,a,fn,f,bcn,bc,den,de,hln,hl,ixn,ix,iyn,iy,spn,sp + + if postccf + + if ( .@veccount % 3 ) == 0 + inst op1,op2,op3,op4,tail +.@areg := 0 + else + db op1,op2,op3,op4,0 +.@areg := .@areg | a + endif + + else + db op1,op2,op3,op4 + endif + + db f + + if postccf & ( ( .veccount % 3 ) == 2 ) + db a | ( ( ~ .@areg ) & 0x28 ) + else + db a + endif + + dw bc,de,hl,ix,iy + dw mem + dw sp + +.@veccount := .@veccount+1 + + endm + + macro crcs allflagsn,allflags,alln,all,docflagsn,docflags,docn,doc,ccfn,ccf,mptrn,mptr + if postccf + ddbe ccf + elseif memptr + ddbe mptr + else + if maskflags + if onlyflags + ddbe docflags + else + ddbe doc + endif + else + if onlyflags + ddbe allflags + else + ddbe all + endif + endif + endif + endm + + macro name n + dz n + endm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm new file mode 100644 index 000000000..08b50847c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/tests.asm @@ -0,0 +1,1379 @@ +; The test vectors themselves. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + +selftests equ 0 ; Set to 1 to include detailed self tests. + +mem equ data.mem +meml equ mem%256 +memh equ mem/256 +memsp equ mem+2 + +jmp equ data.jump +jmpl equ jmp%256 +jmph equ jmp/256 + + if postccf +stop equ 256 +tail equ 0x3f + else +stop equ 0 +tail equ 0 + endif + +testtable: + if selftests + dw .crc + dw .counter + dw .shifter + endif + + dw .selftest + + dw .scf + dw .ccf + dw .scfccf + dw .ccfscf + + dw .daa + dw .cpl + dw .neg + dw .neg_ + + dw .add_a_n + dw .adc_a_n + dw .sub_a_n + dw .sbc_a_n + dw .and_n + dw .xor_n + dw .or_n + dw .cp_n + + dw .alo_a_a + dw .alo_a_b_c + dw .alo_a_d_e + dw .alo_a_h_l + dw .alo_a_hl + dw .alo_a_x + dw .alo_a_y + dw .alo_a_xyd + + dw .rlca + dw .rrca + dw .rla + dw .rra + + dw .rld + dw .rrd + + dw .rlc_a + dw .rrc_a + dw .rl_a + dw .rr_a + dw .sla_a + dw .sra_a + dw .slia_a + dw .srl_a + + dw .rlc_r + dw .rrc_r + dw .rl_r + dw .rr_r + dw .sla_r + dw .sra_r + dw .slia_r + dw .srl_r + + dw .sro_xyd + dw .sro_xyd_r + + dw .inc_a + dw .dec_a + dw .inc_r + dw .dec_r + dw .inc_x + dw .dec_x + dw .inc_xyd + dw .dec_xyd + + dw .inc_rr + dw .dec_rr + dw .inc_xy + dw .dec_xy + + dw .add_hl_rr + dw .add_ix_rr + dw .add_iy_rr + dw .adc_hl_rr + dw .sbc_hl_rr + + dw .bit_n_a + dw .bit_n_hl + dw .bit_n_r + dw .bit_n_xyd + dw .bit_n_xyd_ + + dw .set_n_a + dw .set_n_hl + dw .set_n_r + dw .set_n_xyd + dw .set_n_xyd_ + + dw .res_n_a + dw .res_n_hl + dw .res_n_r + dw .res_n_xyd + dw .res_n_xyd_ + + dw .ldi + dw .ldd + dw .ldir + dw .lddr + + dw .cpi + dw .cpd + dw .cpir + dw .cpdr + + dw .in_a_n + dw .in_r_c + dw .in_c + dw .ini + dw .ind + dw .inir + dw .indr + + dw .out_n_a + dw .out_c_r + dw .out_c_0 + dw .outi + dw .outd + dw .otir + dw .otdr + + dw .jp_nn + dw .jp_cc_nn + dw .jp_hl + dw .jp_xy + + dw .jr_n + dw .jr_cc_n + dw .djnz_n + + dw .call_nn + dw .call_cc_nn + + dw .ret + dw .ret_cc + dw .retn + dw .reti + dw .reti_retn + + dw .pushpop_rr + dw .poppush_af + dw .pushpop_xy + + dw .ex_de_hl + dw .ex_af_af + dw .exx + dw .ex_sp_hl + dw .ex_sp_xy + + dw .ld_r_r + dw .ld_x_x + dw .ld_r_xyd + dw .ld_xyd_r + dw .ld_r_n + dw .ld_x_n + dw .ld_xyd_n + dw .ld_a_rr + dw .ld_rr_a + dw .ld_a_mem + dw .ld_mem_a + + dw .ld_rr_nn + dw .ld_xy_nn + dw .ld_hl_mem + dw .ld_xy_mem + dw .ld_rr_mem + dw .ld_mem_hl + dw .ld_mem_xy + dw .ld_mem_rr + dw .ld_sp_hl + dw .ld_sp_xy + + dw .ld_i_a + dw .ld_r_a + dw .ld_a_i + dw .ld_a_r + + dw .ei_di + dw .im_n + + ; rst + ; halt + + dw 0 + + include testmacros.asm + + ; Test vector template. + ; + ; Each test consists of the following: + ; - Bitmask of which of the modified flags are officially documented. + ; - Three test vectors - base test vector, counter vector and shifter vector. + ; - The CRCs for each of the available test variants. + ; - Test name. + ; + ; The base test vectors specifies the instruction(s) to execute, + ; the initial value of the memory operand, and the initial + ; values of the Z80 registers. + ; + ; The counter vector specifies which combinations of bits shall + ; be toggled in the base test vectors. The test vector is + ; executed once for each possible combination. + ; + ; The shifter vector specifies which bits shall be toggled in + ; the test vector in sequence. After all the initial counter + ; combinations were executed, the whole process is repeated, but + ; now also toggling one of the specified shifter bits at a time. + + if 0 + flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x00,0x00,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xaf0f0011,all,0xac0f0022,docflags,0xdf0f0033,doc,0xdc0f0044,ccf,0x0,mptr,0x0 + name " " + endif + + ; Various selftests. + + if selftests + +.crc flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x00,0x00,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x00ffffff,all,0x2e26825b,docflags,0x354a5705,doc,0x4a0a6669,ccf,0xb062bcdf,mptr,0x4996b8b2 + name "CRC TEST" + +.counter flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x00,0x00,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x01,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x8000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x00000000,all,0x65283e9d,docflags,0x3b3096d9,doc,0x70844659,ccf,0xa424358c,mptr,0x1f36a1d1 + name "COUNTER TEST" + +.shifter flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x00,0x00,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x41,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x8000 + crcs allflags,0x00000000,all,0xd690f8ac,docflags,0x3b3096d9,doc,0xc33c8068,ccf,0xddc5094f,mptr,0x1f36a1d1 + name "SHIFTER TEST" + + endif + +.selftest flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x00,0x00,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x20,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x08,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf3b489a6,all,0x1052d099,docflags,0x3b3096d9,doc,0x48e530ef,ccf,0x97bb028f,mptr,0x1f36a1d1 + name "SELF TEST" + + ; Flag manipulation. + +.scf flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x37,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x28,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xd7,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x3ec05634,all,0xd841bd8a,docflags,0xafbf608b,doc,0x2efb018b,ccf,0xe0d3c7bf,mptr,0x4fc0a073 + name "SCF" + +.ccf flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0x3f,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x28,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xd7,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x5b2237ae,all,0x3fbb71dc,docflags,0x27b2462c,doc,0x96bd3c82,ccf,0x8531a625,mptr,0xc7cd86d4 + name "CCF" + +.scfccf flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0x37,0x3f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x28,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xd7,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xe0d3c7bf,all,0x9086496c,docflags,0x6f887d41,doc,0x3f044693,ccf,0x958e3e1e,mptr,0x8ff7bdb9 + name "SCF+CCF" + +.ccfscf flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x3f,0x37,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x28,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xd7,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x958e3e1e,all,0x45fc79b5,docflags,0xafbf608b,doc,0x2efb018b,ccf,0xe0d3c7bf,mptr,0x4fc0a073 + name "CCF+SCF" + + ; 8 bit arithmetics. + +.daa flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x27,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x13,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xec,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x4fa2a2d3,all,0xe994c6c4,docflags,0x39bd9b50,doc,0xce050987,ccf,0xf664ae86,mptr,0xb43e3905 + name "DAA" + +.cpl flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x2f,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x23dcd704,all,0xe39927d0,docflags,0x9c2c0c93,doc,0xe028b087,ccf,0x169b61fe,mptr,0xbd959484 + name "CPL" + +.neg flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x44,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xed3cb45e,all,0x953a7650,docflags,0xe5ea9a83,doc,0xe6ed5f0d,ccf,0xb88dd2d9,mptr,0x44007b37 + name "NEG" + +.neg_ flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x44,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb5d3962c,all,0xf5ee4f9e,docflags,0x1666fbfb,doc,0x6b734a21,ccf,0x7282acda,mptr,0x54c2af54 + name "NEG'" + +.add_a_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xc6,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb68bee38,all,0xe5166f9d,docflags,0x1ec28381,doc,0xb3ac13f8,ccf,0x458111c4,mptr,0x160b129e + name "ADD A,N" + +.adc_a_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xce,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x08d8adb1,all,0x08bbc92b,docflags,0x916c5e39,doc,0x0d4254b3,ccf,0x2b5b8e14,mptr,0x32f9b8f9 + name "ADC A,N" + +.sub_a_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xd6,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x42656897,all,0x7a32a565,docflags,0xbd411ef5,doc,0x34d93157,ccf,0x68d32973,mptr,0xfd687592 + name "SUB A,N" + +.sbc_a_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xde,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa09fb8f6,all,0x15158a3a,docflags,0xf3a8f826,doc,0xc9e2149b,ccf,0xf74ae063,mptr,0xecba4131 + name "SBC A,N" + +.and_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xe6,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x1330f710,all,0x344db49a,docflags,0x8e181222,doc,0x48c51db7,ccf,0x4d1c8c24,mptr,0xd5aefd16 + name "AND N" + +.xor_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xee,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa39216ec,all,0x0e8a64f8,docflags,0x2f5e8c7c,doc,0x4a8b89b9,ccf,0xf37b322f,mptr,0xd5aefd16 + name "XOR N" + +.or_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xf6,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x927c68c0,all,0x984e7d2f,docflags,0x83981762,doc,0xa0c73943,ccf,0xc2954c03,mptr,0xd5aefd16 + name "OR N" + +.cp_n flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xfe,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb727231e,all,0xd714639b,docflags,0xbd411ef5,doc,0xe811d64d,ccf,0x115df86a,mptr,0xfd687592 + name "CP N" + +.alo_a_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x87,stop,0x00,0x00,mem,0x1234,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x7bf17601,all,0x819740db,docflags,0x2a38d86c,doc,0xc8056bb1,ccf,0x5ba4549a,mptr,0x8288f8b5 + name "ALO A,A" + +.alo_a_b_c flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x80,stop,0x00,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x39,0x00,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x37,f,0xff,bc,0xffff,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xaf8b1bce,all,0x3b2d5d84,docflags,0xc18f696f,doc,0xe24caea3,ccf,0x9499283b,mptr,0x88db2720 + name "ALO A,[B,C]" + +.alo_a_d_e flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x82,stop,0x00,0x00,mem,0x1234,a,0x00,f,0xff,bc,0xbbcc,de,0x0000,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x39,0x00,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x37,f,0xff,bc,0x0000,de,0xffff,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xaf8b1bce,all,0x48bec1d5,docflags,0xc18f696f,doc,0x91df32f2,ccf,0x9499283b,mptr,0x88db2720 + name "ALO A,[D,E]" + +.alo_a_h_l flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x84,stop,0x00,0x00,mem,0x1234,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,0x0000,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x39,0x00,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x37,f,0xff,bc,0x0000,de,0x0000,hl,0xffff,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xaf8b1bce,all,0x317ada1e,docflags,0xc18f696f,doc,0xe81b2939,ccf,0x9499283b,mptr,0x88db2720 + name "ALO A,[H,L]" + +.alo_a_hl flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x86,stop,0x00,0x00,mem,0x1200,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0x37,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xc0f1f3d4,all,0xd6da14b8,docflags,0x4aa02f3b,doc,0x903b071b,ccf,0xc9f87d81,mptr,0x52dee881 + name "ALO A,(HL)" + +.alo_a_x flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x84,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0x0000,iy,0xfd77,sp,0xc000 + vec 0x00,0x39,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x37,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xffff,iy,0x0000,sp,0x0000 + crcs allflags,0xaf8b1bce,all,0x0fe83ffa,docflags,0xc18f696f,doc,0xd689ccdd,ccf,0x9499283b,mptr,0x88db2720 + name "ALO A,[HX,LX]" + +.alo_a_y flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xfd,0x84,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0x0000,sp,0xc000 + vec 0x00,0x39,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x37,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0xffff,sp,0x0000 + crcs allflags,0xaf8b1bce,all,0x57fe309a,docflags,0xc18f696f,doc,0x8e9fc3bd,ccf,0x9499283b,mptr,0x88db2720 + name "ALO A,[HY,LY]" + +.alo_a_xyd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x86,0x00,stop,mem,0x1200,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x38,0x00,0x00,mem,0x0000,a,0xc8,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x37,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x0688d4d0,all,0x0e199fc6,docflags,0x1cff9540,doc,0xacb41617,ccf,0x12a5f62d,mptr,0x8ea78576 + name "ALO A,(XY)" + + ; Shift/Rotation operations. + +.rlca flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x07,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf572e9a6,all,0x2cf14e06,docflags,0x83400114,doc,0x9f1dfe40,ccf,0xd5a70c6a,mptr,0x46c57ece + name "RLCA" + +.rrca flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x0f,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x02507a39,all,0x022ae290,docflags,0xda065d56,doc,0x01ffafbf,ccf,0xb6b74812,mptr,0x1f83228c + name "RRCA" + +.rla flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x17,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf572e9a6,all,0xae39cb75,docflags,0x83400114,doc,0x1dd57b33,ccf,0xd5a70c6a,mptr,0x46c57ece + name "RLA" + +.rra flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x1f,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x02507a39,all,0x9c6094b6,docflags,0xda065d56,doc,0x9fb5d999,ccf,0xb6b74812,mptr,0x1f83228c + name "RRA" + +.rld flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x6f,stop,0x00,mem,0x1200,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0088,a,0x88,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0077,a,0x77,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x31033721,all,0xbfa13284,docflags,0x1289827e,doc,0x9e08d2ce,ccf,0xffa1b2a6,mptr,0x670a95ea + name "RLD" + +.rrd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x67,stop,0x00,mem,0x1200,a,0x00,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0088,a,0x88,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0077,a,0x77,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x144cbc1e,all,0x7db4c060,docflags,0x25caf56c,doc,0x6029a6d6,ccf,0xdaee3999,mptr,0x670a95ea + name "RRD" + +.rlc_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x07,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xfd4e5ef3,all,0x283e77e2,docflags,0x8b7cb641,doc,0x9bd2c7a4,ccf,0xdd9bbb3f,mptr,0x46c57ece + name "RLC A" + +.rrc_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x0f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xd42a65e9,all,0x8ec5c37a,docflags,0x0c7c4286,doc,0x8d108e55,ccf,0x60cd57c2,mptr,0x1f83228c + name "RRC A" + +.rl_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x17,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x9fcd23ea,all,0xf4284a2f,docflags,0xe9ffcb58,doc,0x47c4fa69,ccf,0xbf18c626,mptr,0x46c57ece + name "RL A" + +.rr_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x1f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2c01ccfe,all,0x8ff2a587,docflags,0xf457eb91,doc,0x8c27e8a8,ccf,0x98e6fed5,mptr,0x1f83228c + name "RR A" + +.sla_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x27,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x14e83f4b,all,0x23575776,docflags,0x62dad7f9,doc,0x90bbe730,ccf,0x343dda87,mptr,0x46c57ece + name "SLA A" + +.sra_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x2f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2d1ddbfe,all,0x43fd2a03,docflags,0xf54bfc91,doc,0x4028672c,ccf,0x99fae9d5,mptr,0x1f83228c + name "SRA A" + +.slia_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x37,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x3e979588,all,0x310e725b,docflags,0x48a57d3a,doc,0x82e2c21d,ccf,0x1e427044,mptr,0x46c57ece + name "SLIA A" + +.srl_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x3f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xdf0809ad,all,0x0dd8dbb3,docflags,0x075e2ec2,doc,0x0e0d969c,ccf,0x6bef3b86,mptr,0x1f83228c + name "SRL A" + +.rlc_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x00,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa9cf462b,all,0xd0dbb5c9,docflags,0xd846f0af,doc,0x1d40c543,ccf,0x0de3b8d0,mptr,0x583613cd + name "RLC [R,(HL)]" + +.rrc_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x08,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x46951078,all,0x580c3699,docflags,0xa89fed01,doc,0x6e47194f,ccf,0xb3205743,mptr,0x0ef99a43 + name "RRC [R,(HL)]" + +.rl_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x10,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x39619ccf,all,0x6ce63685,docflags,0x48e82a4b,doc,0xa17d460f,ccf,0x9d4d6234,mptr,0x583613cd + name "RL [R,(HL)]" + +.rr_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x18,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x92fb276b,all,0xaaef8e65,docflags,0x7cf1da12,doc,0x9ca4a1b3,ccf,0x674e6050,mptr,0x0ef99a43 + name "RR [R,(HL)]" + +.sla_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x20,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf40a2fa5,all,0x964172f2,docflags,0x85839921,doc,0x5bda0278,ccf,0x5026d15e,mptr,0x583613cd + name "SLA [R,(HL)]" + +.sra_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x28,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8f46e5af,all,0x1fbb780d,docflags,0x614c18d6,doc,0x29f057db,ccf,0x7af3a294,mptr,0x0ef99a43 + name "SRA [R,(HL)]" + +.slia_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x30,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x1a61a672,all,0xd709a853,docflags,0x6be810f6,doc,0x1a92d8d9,ccf,0xbe4d5889,mptr,0x583613cd + name "SLIA [R,(HL)]" + +.srl_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x38,stop,0x00,mem,0x1234,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xfe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xe3e1480c,all,0xa1ea5b8c,docflags,0x0debb575,doc,0x97a1745a,ccf,0x16540f37,mptr,0x0ef99a43 + name "SRL [R,(HL)]" + +.sro_xyd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x06,mem,0x1200,a,0xa0,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x38,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xc76b6fb8,all,0x1cf5bf25,docflags,0x6ed22cb1,doc,0x4ce1c915,ccf,0x634cfd9b,mptr,0xda289a0a + name "SRO (XY)" + +.sro_xyd_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x00,mem,0x1200,a,0xa0,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x3f,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xfe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xd88fde47,all,0x2e23102b,docflags,0x0af8b1a8,doc,0x31dc0d48,ccf,0xa7ae2064,mptr,0xe9fc598c + name "SRO (XY),R" + + ; 8 bit inc/dec. + +.inc_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x3c,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x87cacbb1,all,0xa55c5156,docflags,0x424ec003,doc,0xef741e2c,ccf,0x79baf440,mptr,0x07fa9b1e + name "INC A" + +.dec_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x3d,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x63cee668,all,0x36167475,docflags,0xc18a1817,doc,0x6e625809,ccf,0x83519741,mptr,0x07fa9b1e + name "DEC A" + +.inc_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x04,stop,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0xffff,de,0xffff,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xbe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x6d329bb5,all,0xad4583fc,docflags,0xa8353115,doc,0x577d9442,ccf,0xa3e04aee,mptr,0xd2af014c + name "INC [R,(HL)]" + +.dec_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0x05,stop,0x00,0x00,mem,0xffff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0xff,f,0xbe,bc,0xffff,de,0xffff,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xe2207af8,all,0xddb3ebf9,docflags,0xea0faeaa,doc,0xfc5aceff,ccf,0x516dcee2,mptr,0xd2af014c + name "DEC [R,(HL)]" + +.inc_x flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x24,stop,0x00,mem,0x1234,a,0xa0,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xffff,iy,0xffff,sp,0xc000 + vec 0x20,0x08,0x00,0x00,mem,0x0000,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0xffff,iy,0xffff,sp,0x0000 + crcs allflags,0x72eec05f,all,0xe5a34ced,docflags,0x48355f66,doc,0x0b3690d0,ccf,0xb575fded,mptr,0x061a489c + name "INC X" + +.dec_x flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x25,stop,0x00,mem,0x1234,a,0xa0,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0x0000,iy,0x0000,sp,0xc000 + vec 0x20,0x08,0x00,0x00,mem,0x0000,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0xffff,iy,0xffff,sp,0x0000 + crcs allflags,0x307ea05a,all,0x331c7bf9,docflags,0x4f85fe9a,doc,0x79ca0f3e,ccf,0xc272dc96,mptr,0x061a489c + name "DEC X" + +.inc_xyd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x34,0x00,stop,mem,0xffff,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0001,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00fe,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xdca01a72,all,0x04323153,docflags,0xfd517beb,doc,0x5e36d887,ccf,0xaf1b424a,mptr,0xbae92d6d + name "INC (XY)" + +.dec_xyd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x35,0x00,stop,mem,0x0000,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0001,a,0x00,f,0x41,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00fe,a,0x00,f,0xbe,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xf0c6ba74,all,0xe317913c,docflags,0x95a51d52,doc,0xc707eef8,ccf,0xaffdbb9c,mptr,0xbae92d6d + name "DEC (XY)" + + ; 16 bit inc/dec. + +.inc_rr flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x03,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xffff,de,0xffff,hl,0xffff,ix,0xdd88,iy,0xfd77,sp,0xffff + vec 0x30,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0001,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0001 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xfffe,de,0xfffe,hl,0xfffe,ix,0x0000,iy,0x0000,sp,0xfffe + crcs allflags,0x12137ffe,all,0x8cd11626,docflags,0x12137ffe,doc,0x8cd11626,ccf,0x0cedc91d,mptr,0x48cdbd6b + name "INC RR" + +.dec_rr flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x0b,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xdd88,iy,0xfd77,sp,0x0000 + vec 0x30,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0001,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0001 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xfffe,de,0xfffe,hl,0xfffe,ix,0x0000,iy,0x0000,sp,0xfffe + crcs allflags,0x12137ffe,all,0x343b2da0,docflags,0x12137ffe,doc,0x343b2da0,ccf,0x0cedc91d,mptr,0x48cdbd6b + name "DEC RR" + +.inc_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x23,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xffff,iy,0xffff,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xfffe,iy,0xfffe,sp,0x0000 + crcs allflags,0x9adb43df,all,0xe132d93b,docflags,0x9adb43df,doc,0xe132d93b,ccf,0xc6e8494f,mptr,0xe5d6883e + name "INC XY" + +.dec_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x2b,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0x0000,iy,0x0000,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xfffe,iy,0xfffe,sp,0x0000 + crcs allflags,0x9adb43df,all,0xd3d07c72,docflags,0x9adb43df,doc,0xd3d07c72,ccf,0xc6e8494f,mptr,0xe5d6883e + name "DEC XY" + + ; 16 bit arithmetics. + +.add_hl_rr flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0x09,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xdd88,iy,0xfd77,sp,0x0000 + vec 0x30,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0xc800,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xffff,de,0xffff,hl,0x37ff,ix,0x0000,iy,0x0000,sp,0xffff + crcs allflags,0x38891c0b,all,0xbfd3ba45,docflags,0xc2a83dbb,doc,0x5d49a198,ccf,0x834a2beb,mptr,0xd81b6329 + name "ADD HL,RR" + +.add_ix_rr flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0xdd,0x09,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x4411,ix,0x0000,iy,0xfd77,sp,0x0000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0xc800,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xffff,de,0xffff,hl,0x0000,ix,0x37ff,iy,0x0000,sp,0xffff + crcs allflags,0x38891c0b,all,0x4c9bba44,docflags,0xc2a83dbb,doc,0xae01a199,ccf,0x834a2beb,mptr,0xd81b6329 + name "ADD IX,RR" + +.add_iy_rr flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0xfd,0x09,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x4411,ix,0xdd88,iy,0x0000,sp,0x0000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0xc800,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xffff,de,0xffff,hl,0x0000,ix,0x0000,iy,0x37ff,sp,0xffff + crcs allflags,0x38891c0b,all,0x5b74c0fe,docflags,0xc2a83dbb,doc,0xb9eedb23,ccf,0x834a2beb,mptr,0xd81b6329 + name "ADD IY,RR" + +.adc_hl_rr flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0xed,0x4a,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xdd88,iy,0xfd77,sp,0x0000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0xc800,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0xffff,de,0xffff,hl,0x37ff,ix,0x0000,iy,0x0000,sp,0xffff + crcs allflags,0x422b5c67,all,0x6c7246df,docflags,0x32f5ed56,doc,0x3fdf376d,ccf,0x490ec3d7,mptr,0x00c7e8a8 + name "ADC HL,RR" + +.sbc_hl_rr flags s,1,z,1,f5,0,hc,0,f3,0,pv,1,n,1,c,1 + vec 0xed,0x42,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0xdd88,iy,0xfd77,sp,0x0000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x01,bc,0x0000,de,0x0000,hl,0xc800,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xfe,bc,0xffff,de,0xffff,hl,0x37ff,ix,0x0000,iy,0x0000,sp,0xffff + crcs allflags,0xbf3c66bf,all,0x8c5ff28a,docflags,0x053b7ece,doc,0xf63a616d,ccf,0x6ab97a85,mptr,0x67ac8297 + name "SBC HL,RR" + + ; Bit instructions. + +.bit_n_a flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x47,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x28,f,0x28,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xd7,f,0xd7,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x94eb9955,all,0x3a1914e7,docflags,0x129a36d9,doc,0x254f5b14,ccf,0x2023d1a2,mptr,0xbe47190a + name "BIT N,A" + +.bit_n_hl flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x46,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0028,a,0x00,f,0x28,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00d7,a,0x00,f,0xd7,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf5d39111,all,0x7f6e6fae,docflags,0x8dcbbff3,doc,0x1fe2af42,ccf,0x77b22658,mptr,0xf3795427 + name "BIT N,(HL)" + +.bit_n_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xcb,0x40,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x3f,0x00,0x00,mem,0x0000,a,0x00,f,0x28,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xd7,bc,0xffff,de,0xffff,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x80f58eca,all,0xb0777901,docflags,0xff835842,doc,0xb7c832b6,ccf,0x736a3cba,mptr,0x60f9121c + name "BIT N,[R,(HL)]" + +.bit_n_xyd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x46,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x38,mem,0x0000,a,0x00,f,0x28,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xd7,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x69d8b807,all,0xac375d19,docflags,0x6e0fa1c8,doc,0xd97a7bb8,ccf,0xa16f2455,mptr,0x1085734f + name "BIT N,(XY)" + +.bit_n_xyd_ flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x40,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x3f,mem,0x0000,a,0x00,f,0x28,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xd7,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xb99e5a2e,all,0x8e78e922,docflags,0x6870b827,doc,0x62003a45,ccf,0x32675fd1,mptr,0xef605a9e + name "BIT N,(XY),-" + +.set_n_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0xc7,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xdc6cce34,all,0x0e29860a,docflags,0xdc6cce34,doc,0x0e29860a,ccf,0x56779cfd,mptr,0xf0154dc0 + name "SET N,A" + +.set_n_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0xc6,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xeaf0e45d,all,0x514cc2f6,docflags,0xeaf0e45d,doc,0x514cc2f6,ccf,0xa20c0caf,mptr,0x5d434474 + name "SET N,(HL)" + +.set_n_r flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0xc0,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x3f,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xffff,de,0xffff,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2bb9d994,all,0xbc87a9e1,docflags,0x2bb9d994,doc,0xbc87a9e1,ccf,0x112577dd,mptr,0x6f46591e + name "SET N,[R,(HL)]" + +.set_n_xyd flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0xc6,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x38,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x2387ec0d,all,0xfc48dc5a,docflags,0x2387ec0d,doc,0xfc48dc5a,ccf,0xc90fadad,mptr,0xf6d0118d + name "SET N,(XY)" + +.set_n_xyd_ flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0xc0,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x3f,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xdf6769a7,all,0x02392678,docflags,0xdf6769a7,doc,0x02392678,ccf,0x246fb380,mptr,0x4ba4554c + name "SET N,(XY),R" + +.res_n_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0x87,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xdc6cce34,all,0x002d3c76,docflags,0xdc6cce34,doc,0x002d3c76,ccf,0x7675bfcf,mptr,0xf0154dc0 + name "RES N,A" + +.res_n_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0x86,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xeaf0e45d,all,0xe0112a76,docflags,0xeaf0e45d,doc,0xe0112a76,ccf,0xa20c0caf,mptr,0x5d434474 + name "RES N,(HL)" + +.res_n_r flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcb,0x80,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x3f,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0xffff,de,0xffff,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2bb9d994,all,0x4a207df2,docflags,0x2bb9d994,doc,0x4a207df2,ccf,0x86080fa1,mptr,0x6f46591e + name "RES N,[R,(HL)]" + +.res_n_xyd flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x86,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x38,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x2387ec0d,all,0x563d39de,docflags,0x2387ec0d,doc,0x563d39de,ccf,0xc90fadad,mptr,0xf6d0118d + name "RES N,(XY)" + +.res_n_xyd_ flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xcb,0x00,0x80,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x3f,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x00ff,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xdf6769a7,all,0x54e6da74,docflags,0xdf6769a7,doc,0x54e6da74,ccf,0x43588b31,mptr,0x4ba4554c + name "RES N,(XY),R" + + ; Block instructions. + +.ldi flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xa0,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0001,de,mem ,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0009,a,0x09,f,0x00,bc,0x0000,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00f6,a,0xf6,f,0xff,bc,0xffff,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x74905a21,all,0x171f174f,docflags,0x25ba7a54,doc,0x2ec1e096,ccf,0x082b1261,mptr,0x9c3ee85a + name "LDI" + +.ldd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xa8,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0001,de,mem ,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0009,a,0x09,f,0x00,bc,0x0000,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00f6,a,0xf6,f,0xff,bc,0xffff,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x74905a21,all,0xd752d9bc,docflags,0x25ba7a54,doc,0xee8c2e65,ccf,0x082b1261,mptr,0x9c3ee85a + name "LDD" + +.ldir flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xb0,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0001,de,mem ,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0009,a,0x09,f,0x00,bc,0x0000,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x00f6,a,0xf6,f,0xff,bc,0x0002,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x62a5e441,all,0xced3ea2d,docflags,0xb06f0da8,doc,0xec3d8ab1,ccf,0xe25b3a0b,mptr,0xec8a174b + name "LDIR" + +.lddr flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xb8,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x0001,de,mem+1 ,hl,mem+1 ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0900,a,0x09,f,0x00,bc,0x0000,de,0x0001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0xf600,a,0xf6,f,0xff,bc,0x0002,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x4650d4e7,all,0x495a8b20,docflags,0xb06f0da8,doc,0x63308b9d,ccf,0xe25b3a0b,mptr,0xec8a174b + name "LDDR" + +.cpi flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xa1,stop,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0001,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0089,a,0x89,f,0x00,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0076,a,0x76,f,0xff,bc,0xffff,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb051c618,all,0xbe38bd05,docflags,0x563bc514,doc,0x1cb7d5cb,ccf,0x435c423d,mptr,0x82fe1009 + name "CPI" + +.cpd flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xa9,stop,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0001,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0089,a,0x89,f,0x00,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0076,a,0x76,f,0xff,bc,0xffff,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb051c618,all,0xc919bd72,docflags,0x563bc514,doc,0x6b96d5bc,ccf,0x435c423d,mptr,0x82fe1009 + name "CPD" + +.cpir flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xb1,stop,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0001,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0089,a,0x89,f,0x00,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0076,a,0x76,f,0xff,bc,0x0002,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x7fe4a6e0,all,0x2e4300cb,docflags,0xe905a9e2,doc,0x54e35cb0,ccf,0xc93a1349,mptr,0xc83e7419 + name "CPIR" + +.cpdr flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0xb9,stop,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0001,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x8900,a,0x89,f,0x00,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x7600,a,0x76,f,0xff,bc,0x0002,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x76cc7038,all,0x9ddab56a,docflags,0x5dfed8d5,doc,0x38a78535,ccf,0xaea4d455,mptr,0xb9d65ad9 + name "CPDR" + + ; Input/Output. + +.in_a_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdb,0xfe,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0x15f7d9b8,docflags,0x919e2255,doc,0x15f7d9b8,ccf,0xc3f6460b,mptr,0x253c1992 + name "IN A,(N)" + +.in_r_c flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x40,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbfe,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x61f21a52,all,0xea2912bf,docflags,0xb6433321,doc,0x9c9c07ec,ccf,0x4801a633,mptr,0x587e9d23 + name "IN R,(C)" + +.in_c flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x70,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbfe,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8f4b242f,all,0x68392c0e,docflags,0x41dd7fcb,doc,0xb285546f,ccf,0x1efcf040,mptr,0x253c1992 + name "IN (C)" + +.ini flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xa2,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0xff00,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x45c2bf9a,all,0x03da7534,docflags,0xdf14e043,doc,0x07d1b0d1,ccf,0x3c480ae3,mptr,0x630733cb + name "INI" + +.ind flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xaa,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0xff00,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa349e955,all,0x4c306b87,docflags,0xdf14e043,doc,0x3dc685fa,ccf,0xc90849ab,mptr,0x630733cb + name "IND" + +.inir flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xb2,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x01fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0200,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x95f331a2,all,0xb1c580a1,docflags,0x550e6d82,doc,0xf9e081a3,ccf,0x34683092,mptr,0x371c7dba + name "INIR" + +.indr flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xb2,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x01fe,de,0xddee,hl,mem+1 ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0200,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x95f331a2,all,0x7cfda032,docflags,0x550e6d82,doc,0x34d8a130,ccf,0x34683092,mptr,0x371c7dba + name "INDR" + +.out_n_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xd3,0xfe,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf99ab3eb,all,0xfaafa4d0,docflags,0xf99ab3eb,doc,0xfaafa4d0,ccf,0x04270b9e,mptr,0x6d2bbd2a + name "OUT (N),A" + +.out_c_r flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x41,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0xff00,de,0xffff,hl,0xffff,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2c0d4f69,all,0x57e2afd4,docflags,0x2c0d4f69,doc,0x57e2afd4,ccf,0x36547c3c,mptr,0xbf071c7d + name "OUT (C),R" + +.out_c_0 flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x71,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0xff,bc,0xff00,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa6eacb74,all,0x5472fbd0,docflags,0xa6eacb74,doc,0x5472fbd0,ccf,0x226855e0,mptr,0xb7b56c76 + name "OUT (C),0" + +.outi flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xa3,stop,0x00,mem,0x0000,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0087,a,0x00,f,0x00,bc,0x8700,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0078,a,0x00,f,0xff,bc,0x7800,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf0c58202,all,0x6b09c8e2,docflags,0x27b692d1,doc,0x58c80d63,ccf,0xba903ab0,mptr,0xa8b663f9 + name "OUTI" + +.outd flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xab,stop,0x00,mem,0x0000,a,0xaa,f,0xff,bc,0x00fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0087,a,0x00,f,0x00,bc,0x8700,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0078,a,0x00,f,0xff,bc,0x7800,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xfa1ad03e,all,0xc186ed7f,docflags,0x27b692d1,doc,0x5425a97b,ccf,0x03275bee,mptr,0xa8b663f9 + name "OUTD" + +.otir flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xb3,stop,0x00,mem,0x0000,a,0xaa,f,0xff,bc,0x01fe,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0087,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0078,a,0x00,f,0xff,bc,0x0200,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x1a975ed3,all,0x366e1554,docflags,0x369c862e,doc,0xa24c0ff2,ccf,0x275e3430,mptr,0x9ff6297f + name "OTIR" + +.otdr flags s,0,z,1,f5,0,hc,0,f3,0,pv,0,n,0,c,0 + vec 0xed,0xbb,stop,0x00,mem,0x0000,a,0xaa,f,0xff,bc,0x01fe,de,0xddee,hl,mem+1 ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x8700,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x7800,a,0x00,f,0xff,bc,0x0200,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xb611c16f,all,0x1781b976,docflags,0x369c862e,doc,0x23b560db,ccf,0xde272f70,mptr,0xd7cf070f + name "OTDR" + + ; Jumps. + +.jp_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc3,jmpl,jmph,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0x719d5e47,docflags,0x919e2255,doc,0x719d5e47,ccf,0xc3f6460b,mptr,0xebaa4276 + name "JP NN" + +.jp_cc_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc2,jmpl,jmph,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x0f8b6dcb,docflags,0x8b69e182,doc,0x0f8b6dcb,ccf,0x05e705e5,mptr,0x4f18bfbb + name "JP CC,NN" + +.jp_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xe9,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,jmp ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x3692d4d4,all,0xc45f00be,docflags,0x3692d4d4,doc,0xc45f00be,ccf,0xba13c043,mptr,0xd33d5eb9 + name "JP (HL)" + +.jp_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xe9,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,jmp ,iy,jmp ,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0xa33672df,all,0x799089df,docflags,0xa33672df,doc,0x799089df,ccf,0x865af2b2,mptr,0xc4b20f8c + name "JP (XY)" + +.jr_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x18,0x00,0x03,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x01,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xafe685dd,all,0x47c8f363,docflags,0xafe685dd,doc,0x47c8f363,ccf,0x699bbcea,mptr,0xe0cb1a62 + name "JR N" + +.jr_cc_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x20,0x00,0x03,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x18,0x01,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0xc7ef0fbd,docflags,0x8b69e182,doc,0xc7ef0fbd,ccf,0x05e705e5,mptr,0xd8878382 + name "JR CC,N" + +.djnz_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x10,0x00,0x03,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x01,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0xff00,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x4031e70c,all,0x6c92b0b3,docflags,0x4031e70c,doc,0x6c92b0b3,ccf,0x44be1574,mptr,0x5ed4d6bd + name "DJNZ N" + + ; Calls. + +.call_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xcd,jmpl,jmph,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem ; not memsp! + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0x95eb1599,docflags,0x919e2255,doc,0x95eb1599,ccf,0xc3f6460b,mptr,0xebaa4276 + name "CALL NN" + +.call_cc_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc4,jmpl,jmph,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem ; not memsp! + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x87b32d29,docflags,0x8b69e182,doc,0x87b32d29,ccf,0x05e705e5,mptr,0x4f18bfbb + name "CALL CC,NN" + + ; Returns. + +.ret flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc9,stop,0x00,0x00,mem,jmp ,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0xb24f5c05,docflags,0x919e2255,doc,0xb24f5c05,ccf,0xc3f6460b,mptr,0xebaa4276 + name "RET" + +.ret_cc flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc0,stop,0x00,0x00,mem,jmp ,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x2b7f37ec,docflags,0x8b69e182,doc,0x2b7f37ec,ccf,0x05e705e5,mptr,0x4f18bfbb + name "RET CC" + +.retn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x45,stop,0x00,mem,jmp ,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0xb24f5c05,docflags,0x919e2255,doc,0xb24f5c05,ccf,0xc3f6460b,mptr,0xebaa4276 + name "RETN" + +.reti flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x4d,stop,0x00,mem,jmp ,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0xb24f5c05,docflags,0x919e2255,doc,0xb24f5c05,ccf,0xc3f6460b,mptr,0xebaa4276 + name "RETI" + +.reti_retn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x45,stop,0x00,mem,jmp ,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x1afc36b0,docflags,0x8b69e182,doc,0x1afc36b0,ccf,0x05e705e5,mptr,0x8fcfb450 + name "RETI/RETN" + + ; Push/Pop. + +.pushpop_rr flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xc5,0xc1,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,memsp + vec 0x30,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x80,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xdac88897,all,0x249c42e7,docflags,0xdac88897,doc,0x249c42e7,ccf,0x15c4c121,mptr,0xee37c5cb + name "PUSH+POP RR" + +.poppush_af flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xf1,0xf5,stop,0x00,mem,0x0000,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x00,0x00,mem,0x00ff,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8100,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x43219c3c,all,0x0deac469,docflags,0x43219c3c,doc,0x0deac469,ccf,0x4d06617f,mptr,0xf487ff91 + name "POP+PUSH AF" + +.pushpop_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xe5,0xdd,0xe1,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,memsp + vec 0x20,0x00,0x20,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x8001,iy,0x8001,sp,0x0000 + crcs allflags,0xb168fa73,all,0x68436a76,docflags,0xb168fa73,doc,0x68436a76,ccf,0xc0d02259,mptr,0xbb40d1fd + name "PUSH+POP XY" + + ; Register swapping. + +.ex_de_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xeb,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x8001,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x716b49bb,all,0x212155ff,docflags,0x716b49bb,doc,0x212155ff,ccf,0x9ff1906f,mptr,0xed1d720b + name "EX DE,HL" + +.ex_af_af flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x08,0xf1,0xc5,0x08,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x30,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x81ff,a,0x81,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x3b686884,all,0x7f6c68db,docflags,0x3b686884,doc,0x7f6c68db,ccf,0x4cfa32a0,mptr,0xa54c92b7 + name "EX AF,AF'" + +.exx flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xd9,0xe1,0xc5,0xd9,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x30,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x81,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xea52817e,all,0xcf11ce0b,docflags,0xea52817e,doc,0xcf11ce0b,ccf,0xb0d477cd,mptr,0x7ffd5c45 + name "EXX" + +.ex_sp_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xe3,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x716b49bb,all,0x424b5572,docflags,0x716b49bb,doc,0x424b5572,ccf,0x9ff1906f,mptr,0x92523322 + name "EX (SP),HL" + +.ex_sp_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xe3,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,mem + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x8001,iy,0x8001,sp,0x0000 + crcs allflags,0x0508a431,all,0x4f6123b9,docflags,0x0508a431,doc,0x4f6123b9,ccf,0x1eb64f30,mptr,0x91d12f85 + name "EX (SP),XY" + + ; 8 bit transfer. + +.ld_r_r flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x40,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x3f,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x01,f,0xff,bc,0x8001,de,0x8001,hl,0x0001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8cc99857,all,0x489568ef,docflags,0x8cc99857,doc,0x489568ef,ccf,0xbc21eb04,mptr,0x8e23d08e + name "LD [R,(HL)],[R,(HL)]" + +.ld_x_x flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x40,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem-tail,iy,mem-tail,sp,0xc000 + vec 0x20,0x3f,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x01,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x02d51675,all,0xf9a80f96,docflags,0x02d51675,doc,0xf9a80f96,ccf,0x889a70f6,mptr,0x8bd555d3 + name "LD [X,(XY)],[X,(XY)]" + +.ld_r_xyd flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x46,-128,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem+128,iy,mem+128,sp,0xc000 + vec 0x20,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x8001,a,0x01,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x322904d3,all,0xc4c0b4fe,docflags,0x322904d3,doc,0xc4c0b4fe,ccf,0xa29318c8,mptr,0xde3b0199 + name "LD R,(XY)" + +.ld_xyd_r flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x70,+126,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem-126,iy,mem-126,sp,0xc000 + vec 0x20,0x07,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0x00,mem,0x8001,a,0x01,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x322904d3,all,0xf64a5633,docflags,0x322904d3,doc,0xf64a5633,ccf,0xa81cad03,mptr,0xde3b0199 + name "LD (XY),R" + +.ld_r_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x06,0x00,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,mem ,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x38,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x835e406c,all,0x54c1de93,docflags,0x835e406c,doc,0x54c1de93,ccf,0x8bd6d3cd,mptr,0xe8e9b1ac + name "LD [R,(HL)],N" + +.ld_x_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x26,0x00,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x20,0x08,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0xff,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x004badd9,all,0x96b86077,docflags,0x004badd9,doc,0x96b86077,ccf,0x6fcf31e3,mptr,0x8f78380c + name "LD X,N" + +.ld_xyd_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x36,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,mem ,iy,mem ,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x01,0xff,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0001,iy,0x0001,sp,0x0000 + crcs allflags,0x8ad7acf3,all,0x5fb49529,docflags,0x8ad7acf3,doc,0x5fb49529,ccf,0x16f3e3af,mptr,0x76a22800 + name "LD (XY),N" + +.ld_a_rr flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x0a,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,mem ,de,mem ,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x10,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0001,de,0x0001,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x44659eca,docflags,0x8b69e182,doc,0x44659eca,ccf,0x5195291d,mptr,0xb4eabc1f + name "LD A,([BC,DE])" + +.ld_rr_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x02,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,mem ,de,mem ,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x10,0x00,0x00,0x00,mem,0x0000,a,0x01,f,0x00,bc,0x0001,de,0x0001,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x2de08788,all,0x17fca30a,docflags,0x2de08788,doc,0x17fca30a,ccf,0xfb8c6d82,mptr,0x6de7210e + name "LD ([BC,DE]),A" + +.ld_a_mem flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x3a,meml,memh,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x01,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xafe685dd,all,0x6e96fa8f,docflags,0xafe685dd,doc,0x6e96fa8f,ccf,0x4f9c7261,mptr,0xe106f727 + name "LD A,(NN)" + +.ld_mem_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x32,meml,memh,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x01,0x00,0x00,mem,0x0000,a,0x01,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x9cc1b7f3,all,0xf5408e38,docflags,0x9cc1b7f3,doc,0xf5408e38,ccf,0x2c174b9f,mptr,0xf6ae8c1d + name "LD (NN),A" + + ; 16 bit transfer. + +.ld_rr_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x01,0x00,0x00,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x30,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0xff,0xff,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x868a302b,all,0x1a6b8abc,docflags,0x868a302b,doc,0x1a6b8abc,ccf,0x91a444f8,mptr,0xcfa6d5ee + name "LD RR,NN" + +.ld_xy_nn flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x21,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0xff,0xff,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf1a4ac7e,all,0xf728df10,docflags,0xf1a4ac7e,doc,0xf728df10,ccf,0x9671de69,mptr,0xa6965d85 + name "LD XY,NN" + +.ld_hl_mem flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x2a,meml,memh,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xac8a6b94,all,0x3103f88d,docflags,0xac8a6b94,doc,0x3103f88d,ccf,0x7049ee1e,mptr,0xfb9ef23e + name "LD HL,(NN)" + +.ld_xy_mem flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x2a,meml,memh,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xa33672df,all,0x68579189,docflags,0xa33672df,doc,0x68579189,ccf,0xaf311f28,mptr,0xcdb40688 + name "LD XY,(NN)" + +.ld_rr_mem flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x4b,meml,memh,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x8001,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x1e1265f2,all,0x191f2bc3,docflags,0x1e1265f2,doc,0x191f2bc3,ccf,0x32ac7143,mptr,0x2960708f + name "LD RR,(NN)" + +.ld_mem_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0x22,meml,memh,stop,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xac8a6b94,all,0x89eb910d,docflags,0xac8a6b94,doc,0x89eb910d,ccf,0x7049ee1e,mptr,0xfb9ef23e + name "LD (NN),HL" + +.ld_mem_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0x22,meml,memh,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x8001,iy,0x8001,sp,0x0000 + crcs allflags,0x313a5635,all,0xce4d5643,docflags,0x313a5635,doc,0xce4d5643,ccf,0x8ea4e97a,mptr,0x8891b6e5 + name "LD (NN),XY" + +.ld_mem_rr flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x43,meml,memh,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x30,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x8001,de,0x8001,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x8001 + crcs allflags,0xcf735d07,all,0x231acf55,docflags,0xcf735d07,doc,0x231acf55,ccf,0x46aaf65e,mptr,0x86a92365 + name "LD (NN),RR" + +.ld_sp_hl flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xf9,stop,0x00,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x8001,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xac8a6b94,all,0xc85266f2,docflags,0xac8a6b94,doc,0xc85266f2,ccf,0x7049ee1e,mptr,0xfb9ef23e + name "LD SP,HL" + +.ld_sp_xy flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xdd,0xf9,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x20,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x8001,iy,0x8001,sp,0x0000 + crcs allflags,0x313a5635,all,0x982e8c00,docflags,0x313a5635,doc,0x982e8c00,ccf,0x8ea4e97a,mptr,0x8891b6e5 + name "LD SP,XY" + + ; Special registers. + +.ld_i_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x47,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf99ab3eb,all,0xfaafa4d0,docflags,0xf99ab3eb,doc,0xfaafa4d0,ccf,0x04270b9e,mptr,0xbd959484 + name "LD I,A" + +.ld_r_a flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x4f,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xf99ab3eb,all,0xfaafa4d0,docflags,0xf99ab3eb,doc,0xfaafa4d0,ccf,0x04270b9e,mptr,0xbd959484 + name "LD R,A" + +.ld_a_i flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x47,0xed,0x57,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0xdede7754,all,0x41c6359b,docflags,0x636fa3e4,doc,0x8344d7d6,ccf,0xc77d47f5,mptr,0xbd959484 + name "LD A,I" + +.ld_a_r flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xed,0x4f,0xed,0x5f,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0xff,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x7a32e3f5,all,0xe3b3d437,docflags,0x8fbe6000,doc,0x095c9ee8,ccf,0x6391d354,mptr,0xbd959484 + name "LD A,R" + + ; Interrupts. + +.ei_di flags s,1,z,1,f5,0,hc,1,f3,0,pv,1,n,1,c,1 + vec 0xfb,0xf3,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x919e2255,all,0x3108b1a3,docflags,0x57357490,doc,0xd1718bee,ccf,0xc3f6460b,mptr,0x61fe077d + name "EI+DI" + +.im_n flags s,1,z,1,f5,1,hc,1,f3,1,pv,1,n,1,c,1 + vec 0xed,0x46,stop,0x00,mem,0x1234,a,0xaa,f,0xff,bc,0xbbcc,de,0xddee,hl,0x4411,ix,0xdd88,iy,0xfd77,sp,0xc000 + vec 0x00,0x38,0x00,0x00,mem,0x0000,a,0x00,f,0x00,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + vec 0x00,0x00,0x00,0x00,mem,0x0000,a,0x00,f,0xff,bc,0x0000,de,0x0000,hl,0x0000,ix,0x0000,iy,0x0000,sp,0x0000 + crcs allflags,0x8b69e182,all,0x44056d8c,docflags,0x8b69e182,doc,0x44056d8c,ccf,0x05e705e5,mptr,0xb4eabc1f + name "IM N" + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80ccf.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80ccf.asm new file mode 100644 index 000000000..8b5d96a89 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80ccf.asm @@ -0,0 +1,18 @@ +; Z80 test - post CCF version. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "CCF" + endm + +maskflags equ 0 +onlyflags equ 1 +postccf equ 1 +memptr equ 0 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80doc.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80doc.asm new file mode 100644 index 000000000..c6b73bb48 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80doc.asm @@ -0,0 +1,18 @@ +; Z80 test - officially documented flags version. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "doc" + endm + +maskflags equ 1 +onlyflags equ 0 +postccf equ 0 +memptr equ 0 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80docflags.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80docflags.asm new file mode 100644 index 000000000..389e0bc58 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80docflags.asm @@ -0,0 +1,18 @@ +; Z80 test - officially documented flags, flags only version. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "doc flags" + endm + +maskflags equ 1 +onlyflags equ 1 +postccf equ 0 +memptr equ 0 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80flags.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80flags.asm new file mode 100644 index 000000000..a36e751eb --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80flags.asm @@ -0,0 +1,18 @@ +; Z80 test - flags only version. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "flags" + endm + +maskflags equ 0 +onlyflags equ 1 +postccf equ 0 +memptr equ 0 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80full.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80full.asm new file mode 100644 index 000000000..579c2463f --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80full.asm @@ -0,0 +1,18 @@ +; Z80 test - the full version. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "full" + endm + +maskflags equ 0 +onlyflags equ 0 +postccf equ 0 +memptr equ 0 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80memptr.asm b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80memptr.asm new file mode 100644 index 000000000..3efac221c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/src/z80memptr.asm @@ -0,0 +1,21 @@ +; Z80 test - MEMPTR version. +; +; However note that the current set of tests was not designed to stress test MEMPTR +; particularly, so it doesn't detect much - I may eventually add such specific tests later. +; +; Copyright (C) 2012 Patrik Rak (patrik@raxoft.cz) +; +; This source code is released under the MIT license, see included license.txt. + + macro testname + db "MEMPTR" + endm + +maskflags equ 0 +onlyflags equ 1 +postccf equ 0 +memptr equ 1 + + include main.asm + +; EOF ; diff --git a/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80ccf.tap b/OSBindings/Mac/Clock SignalTests/Patrik Rak Z80 Tests/z80ccf.tap new file mode 100644 index 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z3}WUob7mpRfq`eniQgVMQ~ zl)LLz#Q+6+2$AL-Al1mge!JQ(M$Wh8cP@&@dIsR1tmKVC20uJ#99*KLuJGG`0SDw$1OWtm4gJ)$)ndTU%JHqH;E{(* zOA|)19kb7Mk7y?Q9SA&^WeE-VX^l_pD}jcUf$HF zjhAnAVfY(1Q<%B3^-%fI2)$WHZUc@T1`ZP3{(9CcqpGLU=q;O+@jQWZ<1}IX9v#y1e+^b ztD5?71aCJ`VPQ(|(-uUkQL*b{*HK?Q^eM|&rzTMtgcm$~sKE9hrzi*o6Ak7aPo8F+ z)b=3sbVXkVr&)^OFU5@y*5U~YY*{+Y7;t`g%27CIIO-5IhCmMdRktdinMxNQwnf09 zECiGxJSI~yL?g+Zs=`!I)yL&DNh+1~=Y?K?g002m(ISD^bt-HNU|GY>rbE{3l{qjTN zD`z0VcTsF1G%$d%?IW1VtSg%(&*IByRWwUEt}&~L!CI$~n8SqAD`gw5aSX{Kti0p9i%U^=dUoN^#tk zlh~Ghq8_0Duj0Iv(^}1en0 hl,.... OK\n\r" + + "add hl,.......... OK\n\r" + + "add ix,.......... OK\n\r" + + "add iy,.......... OK\n\r" + + "aluop a,nn.................... OK\n\r" + + "aluop a,.. OK\n\r" + + "aluop a,..... OK\n\r" + + "aluop a,(+1)........... OK\n\r" + + "bit n,(+1)............. OK\n\r" + + "bit n,.... OK\n\r" + + "cpd........................ OK\n\r" + + "cpi........................ OK\n\r" + + "............. OK\n\r" + + " a................... OK\n\r" + + " b................... OK\n\r" + + " bc.................. OK\n\r" + + " c................... OK\n\r" + + " d................... OK\n\r" + + " de.................. OK\n\r" + + " e................... OK\n\r" + + " h................... OK\n\r" + + " hl.................. OK\n\r" + + " ix.................. OK\n\r" + + " iy.................. OK\n\r" + + " l................... OK\n\r" + + " (hl)................ OK\n\r" + + " sp.................. OK\n\r" + + " (+1)......... OK\n\r" + + " ixh................. OK\n\r" + + " ixl................. OK\n\r" + + " iyh................. OK\n\r" + + " iyl................. OK\n\r" + + "ld ,(nnnn)............. OK\n\r" + + "ld hl,(nnnn).................. OK\n\r" + + "ld sp,(nnnn).................. OK\n\r" + + "ld ,(nnnn)............. OK\n\r" + + "ld (nnnn),............. OK\n\r" + + "ld (nnnn),hl.................. OK\n\r" + + "ld (nnnn),sp.................. OK\n\r" + + "ld (nnnn),............. OK\n\r" + + "ld ,nnnn......... OK\n\r" + + "ld ,nnnn............... OK\n\r" + + "ld a,<(bc),(de)>.............. OK\n\r" + + "ld ,nn.... OK\n\r" + + "ld (+1),nn............. OK\n\r" + + "ld ,(+1)...... OK\n\r" + + "ld ,(+1).......... OK\n\r" + + "ld a,(+1).............. OK\n\r" + + "ld ,nn....... OK\n\r" + + "ld ,........ OK\n\r" + + "ld ,........ OK\n\r" + + "ld a,(nnnn) / ld (nnnn),a..... OK\n\r" + + "ldd (1).................... OK\n\r" + + "ldd (2).................... OK\n\r" + + "ldi (1).................... OK\n\r" + + "ldi (2).................... OK\n\r" + + "neg........................... OK\n\r" + + "..................... OK\n\r" + + "........... OK\n\r" + + "shf/rot (+1)........... OK\n\r" + + "shf/rot .. OK\n\r" + + " n,..... OK\n\r" + + " n,(+1)....... OK\n\r" + + "ld (+1),...... OK\n\r" + + "ld (+1),.......... OK\n\r" + + "ld (+1),a.............. OK\n\r" + + "ld (),a................ OK\n\r" + + "Tests complete\n\r" + XCTAssertEqual(targetOutput, output); + } + } + } + + func testCCF() { + runTest("z80ccf") + } + + func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) { + let testMachineZ80 = testMachine as! CSTestMachineZ80 + switch address { + case 0x0010: + print("TODO") + + let cRegister = testMachineZ80.value(for: .C) + var textToAppend = "" + switch cRegister { + case 9: + var address = testMachineZ80.value(for: .DE) + var character: Character = " " + while true { + character = Character(UnicodeScalar(testMachineZ80.value(atAddress: address))) + if character == "$" { + break + } + textToAppend += String(character) + address = address + 1 + } + case 5: + textToAppend = String(describing: UnicodeScalar(testMachineZ80.value(for: .E))) + case 0: + done = true + default: + break + } + output += textToAppend + print(textToAppend) + + case 0x7003: + done = true + + default: + break + } + } +}