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Permitted register 3 to dictate vertical sync length.

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This commit is contained in:
Thomas Harte 2017-08-04 08:56:36 -04:00
parent d9097facf1
commit 26ce6cdab2
1 changed files with 2 additions and 1 deletions
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3
Components/6845/CRTC6845.hpp
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@ -106,7 +106,8 @@ template <class T> class CRTC6845 {
// check for start of vertical sync
if(line_counter_ == registers_[7]) {
bus_state_.vsync = true;
vsync_down_counter_ = 16; // TODO
vsync_down_counter_ = registers_[3] >> 4;
if(!vsync_down_counter_) vsync_down_counter_ = 16;
}
// check for entry into the overflow area