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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-25 03:32:01 +00:00

Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.

This commit is contained in:
Thomas Harte 2017-07-25 22:21:09 -04:00
parent d9c6b3bcf7
commit 279c369a1f
12 changed files with 21 additions and 23 deletions

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@ -27,7 +27,7 @@ template<class T> class Cartridge:
void advance_cycles(int cycles) {}
// to satisfy CPU::MOS6502::Processor
unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
uint8_t returnValue = 0xff;
int cycles_run_for = 3;
@ -158,7 +158,7 @@ template<class T> class Cartridge:
if(!tia_->get_cycles_until_horizontal_blank(cycles_since_video_update_)) CPU::MOS6502::Processor<Cartridge<T>>::set_ready_line(false);
return (unsigned int)(cycles_run_for / 3);
return Cycles(cycles_run_for / 3);
}
void flush() {

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@ -34,7 +34,7 @@ void Machine::set_serial_bus(std::shared_ptr<::Commodore::Serial::Bus> serial_bu
Commodore::Serial::AttachPortAndBus(serial_port_, serial_bus);
}
unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
/*
Memory map (given that I'm unsure yet on any potential mirroring):
@ -66,7 +66,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
serial_port_VIA_->run_for(Cycles(1));
drive_VIA_.run_for(Cycles(1));
return 1;
return Cycles(1);
}
void Machine::set_rom(const std::vector<uint8_t> &rom) {

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@ -142,7 +142,7 @@ class Machine:
void set_disk(std::shared_ptr<Storage::Disk::Disk> disk);
// to satisfy CPU::MOS6502::Processor
unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
// to satisfy MOS::MOS6522::Delegate
virtual void mos6522_did_change_interrupt_status(void *mos6522);

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@ -97,7 +97,7 @@ Machine::~Machine() {
delete[] rom_;
}
unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
// run the phase-1 part of this cycle, in which the VIC accesses memory
if(!is_running_at_zero_cost_) mos6560_->run_for(Cycles(1));
@ -190,7 +190,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
tape_->run_for(Cycles(1));
if(c1540_) c1540_->run_for(Cycles(1));
return 1;
return Cycles(1);
}
#pragma mark - 6522 delegate

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@ -166,7 +166,7 @@ class Machine:
inline void set_use_fast_tape_hack(bool activate) { use_fast_tape_hack_ = activate; }
// to satisfy CPU::MOS6502::Processor
unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
void flush() { mos6560_->flush(); }
// to satisfy CRTMachine::Machine

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@ -122,7 +122,7 @@ void Machine::set_rom(ROMSlot slot, std::vector<uint8_t> data, bool is_writeable
#pragma mark - The bus
unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
unsigned int cycles = 1;
if(address < 0x8000) {
@ -339,7 +339,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
}
}
return cycles;
return Cycles(cycles);
}
void Machine::flush() {

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@ -86,7 +86,7 @@ class Machine:
void configure_as_target(const StaticAnalyser::Target &target);
// to satisfy CPU::MOS6502::Processor
unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
void flush();
// to satisfy CRTMachine::Machine

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@ -77,7 +77,7 @@ void Machine::set_rom(ROM rom, const std::vector<uint8_t> &data) {
}
}
unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
if(address > ram_top_) {
if(isReadOperation(operation)) *value = paged_rom_[address - ram_top_ - 1];
@ -132,7 +132,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
via_.run_for(Cycles(1));
if(microdisc_is_enabled_) microdisc_.run_for(Cycles(8));
cycles_since_video_update_++;
return 1;
return Cycles(1);
}
void Machine::flush() {

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@ -77,7 +77,7 @@ class Machine:
void configure_as_target(const StaticAnalyser::Target &target);
// to satisfy CPU::MOS6502::Processor
unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
void flush();
// to satisfy CRTMachine::Machine

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@ -75,7 +75,6 @@
useCustomWorkingDirectory = "NO"
ignoresPersistentStateOnLaunch = "NO"
debugDocumentVersioning = "YES"
enableAddressSanitizer = "YES"
debugServiceExtension = "internal"
allowLocationSimulation = "NO">
<BuildableProductRunnable

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@ -181,7 +181,7 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
}
bool is_jammed_;
int cycles_left_to_run_;
Cycles cycles_left_to_run_;
enum InterruptRequestFlags: uint8_t {
Reset = 0x80,
@ -264,7 +264,6 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
protected:
Processor() :
is_jammed_(false),
cycles_left_to_run_(0),
ready_line_is_enabled_(false),
ready_is_active_(false),
inverse_interrupt_flag_(0),
@ -338,14 +337,14 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
irq_request_history_ = irq_line_ & inverse_interrupt_flag_; \
number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(nextBusOperation, busAddress, busValue); \
nextBusOperation = BusOperation::None; \
if(number_of_cycles <= 0) break;
if(number_of_cycles <= Cycles(0)) break;
checkSchedule();
int number_of_cycles = cycles.as_int() + cycles_left_to_run_;
Cycles number_of_cycles = cycles + cycles_left_to_run_;
while(number_of_cycles > 0) {
while(number_of_cycles > Cycles(0)) {
while (ready_is_active_ && number_of_cycles > 0) {
while (ready_is_active_ && number_of_cycles > Cycles(0)) {
number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(BusOperation::Ready, busAddress, busValue);
}

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@ -20,7 +20,7 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public Processor<Concrete
set_power_on(false);
}
inline int perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) {
inline Cycles perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) {
timestamp_++;
if(operation == BusOperation::ReadOpcode) {
@ -33,7 +33,7 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public Processor<Concrete
memory_[address] = *value;
}
return 1;
return Cycles(1);
}
void run_for(const Cycles &cycles) {