mirror of
https://github.com/TomHarte/CLK.git
synced 2024-12-25 18:30:21 +00:00
Switched to Cycles as the result from the 6502 perform_bus_operation
, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.
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@ -27,7 +27,7 @@ template<class T> class Cartridge:
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void advance_cycles(int cycles) {}
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// to satisfy CPU::MOS6502::Processor
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unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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uint8_t returnValue = 0xff;
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int cycles_run_for = 3;
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@ -158,7 +158,7 @@ template<class T> class Cartridge:
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if(!tia_->get_cycles_until_horizontal_blank(cycles_since_video_update_)) CPU::MOS6502::Processor<Cartridge<T>>::set_ready_line(false);
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return (unsigned int)(cycles_run_for / 3);
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return Cycles(cycles_run_for / 3);
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}
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void flush() {
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@ -34,7 +34,7 @@ void Machine::set_serial_bus(std::shared_ptr<::Commodore::Serial::Bus> serial_bu
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Commodore::Serial::AttachPortAndBus(serial_port_, serial_bus);
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}
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unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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/*
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Memory map (given that I'm unsure yet on any potential mirroring):
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@ -66,7 +66,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
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serial_port_VIA_->run_for(Cycles(1));
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drive_VIA_.run_for(Cycles(1));
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return 1;
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return Cycles(1);
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}
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void Machine::set_rom(const std::vector<uint8_t> &rom) {
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@ -142,7 +142,7 @@ class Machine:
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void set_disk(std::shared_ptr<Storage::Disk::Disk> disk);
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// to satisfy CPU::MOS6502::Processor
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unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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// to satisfy MOS::MOS6522::Delegate
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virtual void mos6522_did_change_interrupt_status(void *mos6522);
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@ -97,7 +97,7 @@ Machine::~Machine() {
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delete[] rom_;
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}
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unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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// run the phase-1 part of this cycle, in which the VIC accesses memory
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if(!is_running_at_zero_cost_) mos6560_->run_for(Cycles(1));
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@ -190,7 +190,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
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tape_->run_for(Cycles(1));
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if(c1540_) c1540_->run_for(Cycles(1));
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return 1;
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return Cycles(1);
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}
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#pragma mark - 6522 delegate
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@ -166,7 +166,7 @@ class Machine:
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inline void set_use_fast_tape_hack(bool activate) { use_fast_tape_hack_ = activate; }
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// to satisfy CPU::MOS6502::Processor
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unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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void flush() { mos6560_->flush(); }
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// to satisfy CRTMachine::Machine
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@ -122,7 +122,7 @@ void Machine::set_rom(ROMSlot slot, std::vector<uint8_t> data, bool is_writeable
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#pragma mark - The bus
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unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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unsigned int cycles = 1;
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if(address < 0x8000) {
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@ -339,7 +339,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
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}
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}
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return cycles;
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return Cycles(cycles);
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}
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void Machine::flush() {
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@ -86,7 +86,7 @@ class Machine:
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void configure_as_target(const StaticAnalyser::Target &target);
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// to satisfy CPU::MOS6502::Processor
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unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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void flush();
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// to satisfy CRTMachine::Machine
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@ -77,7 +77,7 @@ void Machine::set_rom(ROM rom, const std::vector<uint8_t> &data) {
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}
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}
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unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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Cycles Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
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if(address > ram_top_) {
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if(isReadOperation(operation)) *value = paged_rom_[address - ram_top_ - 1];
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@ -132,7 +132,7 @@ unsigned int Machine::perform_bus_operation(CPU::MOS6502::BusOperation operation
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via_.run_for(Cycles(1));
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if(microdisc_is_enabled_) microdisc_.run_for(Cycles(8));
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cycles_since_video_update_++;
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return 1;
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return Cycles(1);
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}
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void Machine::flush() {
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@ -77,7 +77,7 @@ class Machine:
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void configure_as_target(const StaticAnalyser::Target &target);
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// to satisfy CPU::MOS6502::Processor
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unsigned int perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value);
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void flush();
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// to satisfy CRTMachine::Machine
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@ -75,7 +75,6 @@
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useCustomWorkingDirectory = "NO"
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ignoresPersistentStateOnLaunch = "NO"
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debugDocumentVersioning = "YES"
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enableAddressSanitizer = "YES"
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debugServiceExtension = "internal"
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allowLocationSimulation = "NO">
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<BuildableProductRunnable
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@ -181,7 +181,7 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
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}
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bool is_jammed_;
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int cycles_left_to_run_;
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Cycles cycles_left_to_run_;
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enum InterruptRequestFlags: uint8_t {
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Reset = 0x80,
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@ -264,7 +264,6 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
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protected:
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Processor() :
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is_jammed_(false),
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cycles_left_to_run_(0),
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ready_line_is_enabled_(false),
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ready_is_active_(false),
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inverse_interrupt_flag_(0),
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@ -338,14 +337,14 @@ template <class T> class Processor: public ProcessorBase, public ClockReceiver<P
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irq_request_history_ = irq_line_ & inverse_interrupt_flag_; \
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(nextBusOperation, busAddress, busValue); \
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nextBusOperation = BusOperation::None; \
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if(number_of_cycles <= 0) break;
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if(number_of_cycles <= Cycles(0)) break;
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checkSchedule();
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int number_of_cycles = cycles.as_int() + cycles_left_to_run_;
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Cycles number_of_cycles = cycles + cycles_left_to_run_;
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while(number_of_cycles > 0) {
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while(number_of_cycles > Cycles(0)) {
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while (ready_is_active_ && number_of_cycles > 0) {
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while (ready_is_active_ && number_of_cycles > Cycles(0)) {
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(BusOperation::Ready, busAddress, busValue);
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}
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@ -20,7 +20,7 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public Processor<Concrete
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set_power_on(false);
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}
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inline int perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) {
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inline Cycles perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) {
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timestamp_++;
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if(operation == BusOperation::ReadOpcode) {
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@ -33,7 +33,7 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public Processor<Concrete
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memory_[address] = *value;
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}
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return 1;
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return Cycles(1);
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}
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void run_for(const Cycles &cycles) {
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