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mirror of https://github.com/TomHarte/CLK.git synced 2024-06-09 17:29:36 +00:00

Resolve video addressing issues.

This commit is contained in:
Thomas Harte 2024-04-05 21:56:31 -04:00
parent 3f40e409c5
commit 2865190499
2 changed files with 11 additions and 8 deletions

View File

@ -79,7 +79,7 @@ struct MemoryController {
switch(write_zones_[(address >> 21) & 31]) {
case Zone::DMAAndMEMC: {
const auto buffer_address = [](uint32_t source) -> uint32_t {
return (source & 0x1fffc0) << 2;
return (source & 0x1'fffc) << 2;
};
// The MEMC itself isn't on the data bus; all values below should be taken from `address`.

View File

@ -126,8 +126,6 @@ struct Video {
if(vertical_state_.position == vertical_timing_.period) {
vertical_state_.position = 0;
address_ = frame_start_;
if(address_ == buffer_end_) address_ = buffer_start_;
entered_sync_ = true;
interrupt_observer_.update_interrupts();
}
@ -157,7 +155,12 @@ struct Video {
const auto next_byte = [&]() -> uint8_t {
const auto next = ram_[address_];
++address_;
if(address_ == buffer_end_) address_ = buffer_start_;
// `buffer_end_` is the final address that a 16-byte block will be fetched from;
// the +16 here papers over the fact that I'm not accurately implementing DMA.
if(address_ == buffer_end_ + 16) {
address_ = buffer_start_;
}
return next;
};
@ -284,10 +287,10 @@ struct Video {
return interrupt;
}
void set_frame_start(uint32_t address) { frame_start_ = address & 0x7'ffff; }
void set_buffer_start(uint32_t address) { buffer_start_ = address & 0x7'ffff; }
void set_buffer_end(uint32_t address) { buffer_end_ = address & 0x7'ffff; }
void set_cursor_start(uint32_t address) { cursor_start_ = address & 0x7'ffff; }
void set_frame_start(uint32_t address) { frame_start_ = address; }
void set_buffer_start(uint32_t address) { buffer_start_ = address; }
void set_buffer_end(uint32_t address) { buffer_end_ = address; }
void set_cursor_start(uint32_t address) { cursor_start_ = address; }
Outputs::CRT::CRT &crt() { return crt_; }
const Outputs::CRT::CRT &crt() const { return crt_; }