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Adds the shift register interrupt.
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@ -84,7 +84,10 @@ template <typename T> void MOS6522<T>::set_register(int address, uint8_t value)
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break;
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// Shift
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case 0xa: registers_.shift = value; break;
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case 0xa:
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registers_.shift = value;
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shift_bits_remaining_ = 8;
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break;
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// Control
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case 0xb:
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@ -175,7 +178,9 @@ template <typename T> uint8_t MOS6522<T>::get_register(int address) {
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return registers_.timer[1] & 0x00ff;
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case 0x9: return registers_.timer[1] >> 8;
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case 0xa: return registers_.shift;
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case 0xa:
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shift_bits_remaining_ = 8;
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return registers_.shift;
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case 0xb: return registers_.auxiliary_control;
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case 0xc: return registers_.peripheral_control;
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@ -363,11 +368,21 @@ template <typename T> void MOS6522<T>::set_control_line_output(Port port, Line l
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template <typename T> void MOS6522<T>::shift_in() {
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registers_.shift = uint8_t((registers_.shift << 1) | (control_inputs_[1].lines[1] ? 1 : 0));
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--shift_bits_remaining_;
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if(!shift_bits_remaining_) {
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registers_.interrupt_flags |= InterruptFlag::ShiftRegister;
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reevaluate_interrupts();
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}
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}
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template <typename T> void MOS6522<T>::shift_out() {
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set_control_line_output(Port::B, Line::Two, registers_.shift & 0x80);
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registers_.shift <<= 1;
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--shift_bits_remaining_;
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if(!shift_bits_remaining_) {
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registers_.interrupt_flags |= InterruptFlag::ShiftRegister;
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reevaluate_interrupts();
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}
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}
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}
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@ -50,6 +50,7 @@ class MOS6522Storage {
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bool timer_is_running_[2] = {false, false};
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bool last_posted_interrupt_status_ = false;
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int shift_bits_remaining_ = 8;
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enum InterruptFlag: uint8_t {
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CA2ActiveEdge = 1 << 0,
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