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https://github.com/TomHarte/CLK.git
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Corrects MOVEA, adds extra test safeguards.
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parent
2c78ea1a4e
commit
2ba66c4457
@ -77,9 +77,11 @@ class EmuTOS: public CPU::MC68000::BusHandler {
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cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift();
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break;
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case Microcycle::SelectWord:
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assert(!(is_rom && !is_peripheral));
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base[word_address] = cycle.value->full;
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break;
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case Microcycle::SelectByte:
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assert(!(is_rom && !is_peripheral));
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base[word_address] = (cycle.value->full & cycle.byte_mask()) | (base[word_address] & (0xffff ^ cycle.byte_mask()));
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break;
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}
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@ -52,6 +52,12 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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// no instruction was ongoing. Either way, do a standard instruction operation.
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// TODO: unless an interrupt is pending, or the trap flag is set.
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std::cout << std::setw(8) << std::right;
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std::cout << (extend_flag_ ? 'x' : '-') << (negative_flag_ ? 'n' : '-') << (zero_result_ ? '-' : 'z');
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std::cout << (overflow_flag_ ? 'v' : '-') << (carry_flag_ ? 'c' : '-') << '\t';
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for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << data_[c].full << " ";
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for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << address_[c].full << " ";
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std::cout << std::endl;
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decoded_instruction_ = prefetch_queue_.halves.high.full;
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if(!instructions[decoded_instruction_].micro_operations) {
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@ -59,12 +65,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
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return;
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} else {
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for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << data_[c].full << " ";
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for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << address_[c].full << " ";
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std::cout << std::endl;
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std::cout << std::hex << (program_counter_.full - 4) << ": " << decoded_instruction_ << '\t';
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std::cout << (extend_flag_ ? 'x' : '-') << (negative_flag_ ? 'n' : '-') << (zero_result_ ? '-' : 'z');
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std::cout << (overflow_flag_ ? 'v' : '-') << (carry_flag_ ? 'c' : '-') << '\t';
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std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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}
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active_program_ = &instructions[decoded_instruction_];
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@ -194,7 +195,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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active_micro_op_->bus_program = branch_taken_bus_steps_;
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} else {
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if(byte_offset) {
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active_micro_op_->bus_program = branch_byte_not_taken_bus_steps_;
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active_micro_op_->bus_program = branch_byte_not_taken_bus_steps_;
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} else {
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active_micro_op_->bus_program = branch_word_not_taken_bus_steps_;
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}
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@ -1546,10 +1546,8 @@ struct ProcessorStorageConstructor {
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l2(combined_source_mode, combined_destination_mode) :
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bw2(combined_source_mode, combined_destination_mode);
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// If the move is to an address register, switch the MOVE to a MOVEA and
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// pretend it's to a data register; if the move is from an address register
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// then just call it a move from a data register.
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if(ea_mode == 0x01) {
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// If the move is to an address register, switch the MOVE to a MOVEA.
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if(destination_mode == 0x01) {
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operation = is_long_word_access ? Operation::MOVEAl : Operation::MOVEAw;
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}
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