From 2d114b6677e3eec20b3a044ec2e686514bc4a881 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 22 Oct 2025 17:37:01 -0400 Subject: [PATCH] Implement JSR. --- Processors/6502Mk2/Implementation/6502.hpp | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Processors/6502Mk2/Implementation/6502.hpp b/Processors/6502Mk2/Implementation/6502.hpp index be8ca980c..9e7b74063 100644 --- a/Processors/6502Mk2/Implementation/6502.hpp +++ b/Processors/6502Mk2/Implementation/6502.hpp @@ -579,7 +579,23 @@ void Processor::run_for(const Cycles cycles) { ); goto jammed; + // MARK: - Flow control (other than BRK). + + case access_program(JSR): + ++registers.pc.full; + access(BusOperation::Read, Stack(registers.s), throwaway); + access(BusOperation::Write, Stack(registers.dec_s()), registers.pc.halves.high); + access(BusOperation::Write, Stack(registers.dec_s()), registers.pc.halves.low); + + check_interrupt(); + access(BusOperation::Read, Literal(registers.pc.full), registers.pc.halves.high); + registers.pc.halves.low = Storage::operand_; + + goto fetch_decode; + + // MARK: - NMI/IRQ/Reset, and BRK. + case access_program(BRK): ++registers.pc.full; access(BusOperation::Write, Stack(registers.dec_s()), registers.pc.halves.high);