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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-04 18:29:40 +00:00

Switch shift/roll semantics to reduce extension words and for sanity generally.

37 failures.
This commit is contained in:
Thomas Harte 2023-09-27 16:40:34 -04:00
parent 638f3d3a53
commit 2d882d2153
3 changed files with 15 additions and 8 deletions

View File

@ -390,8 +390,6 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
case 0xd0: case 0xd1:
ShiftGroup();
source_ = Source::Immediate;
operand_ = 1;
break;
case 0xd2: case 0xd3:
ShiftGroup();

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@ -162,19 +162,27 @@ enum class Operation: uint8_t {
PUSH,
/// PUSH the flags register to the stack.
PUSHF,
/// Rotate the destination left through carry the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the rotation is by a single position only.
RCL,
/// Rotate the destination right through carry the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the rotation is by a single position only.
RCR,
/// Rotate the destination left the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the rotation is by a single position only.
ROL,
/// Rotate the destination right the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the rotation is by a single position only.
ROR,
/// Arithmetic shift left the destination by the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the shift is by a single position only.
SAL,
/// Arithmetic shift right the destination by the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the shift is by a single position only.
SAR,
/// Logical shift right the destination by the number of bits indicated by source; if the source is a register then implicitly its size is 1.
/// If it is ::None then the shift is by a single position only.
SHR,
/// Clear carry flag; no source or destination provided.

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@ -128,10 +128,10 @@ std::string to_string(InstructionSet::x86::DataPointer pointer, const Instructio
- (NSArray<NSString *> *)testFiles {
NSString *path = [NSString stringWithUTF8String:TestSuiteHome];
NSSet *allowList = nil;
// [[NSSet alloc] initWithArray:@[
// @"DB.json.gz",
// ]];
NSSet *allowList = nil; /*
[[NSSet alloc] initWithArray:@[
@"D0.5.json.gz",
]]; */
// Unofficial opcodes; ignored for now.
NSSet *ignoreList =
@ -237,6 +237,7 @@ std::string to_string(InstructionSet::x86::DataPointer pointer, const Instructio
}
if(operands > 0) {
switch(instruction.source().source()) {
case Source::None: break;
case Source::eCX: operation += ", cl"; break;
case Source::Immediate:
// Providing an immediate operand of 1 is a little future-proofing by the decoder; the '1'
@ -331,8 +332,8 @@ std::string to_string(InstructionSet::x86::DataPointer pointer, const Instructio
// Known existing failures versus the provided 8088 disassemblies:
//
// * quite a lot of instances similar to jmp word ss:[bp+si+1DEAh] being decoded as jmp word ss:[bp+di+1DEAh]
// for ff a3 ea 1d; I don't currently know why SI is used rather than DI;
// * quite a lot of instances similar to [bp+si+1DEAh] being decoded as [bp+di+1DEAh]; there is an error in the
// test set where si will appear where di should, which obscures potential problems here;
// * shifts that have been given a literal source of '1' shouldn't print it; that's a figment ofd this encoding;
// * similarly, shifts should print cl as a source rather than cx even when shifting a word;
// * ... and in/out should always use an 8-bit source;