mirror of
https://github.com/TomHarte/CLK.git
synced 2024-12-27 16:31:31 +00:00
Improves MEMPTR testing and some results.
This commit is contained in:
Thomas Harte
parent
7959d243f6
commit
3097c4ccae
@ -87,6 +87,8 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
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func testFull() {
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runTest("z80full")
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// Current status: 002 of 152 tests failed.
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// Specifically: BIT N,(HL) and BIT N,[R,(HL)], i.e. MEMPTR by proxy.
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}
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func testMemptr() {
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@ -8,10 +8,10 @@
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import XCTest
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class Z80MemptrTests: XCTestCase {
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private let machine = CSTestMachineZ80()
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class Z80MemptrTester: XCTestCase {
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let machine = CSTestMachineZ80()
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private func test(program : [UInt8], length : Int32, initialValue : UInt16) -> UInt16 {
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private func test(program : [UInt8], initialValue : UInt16) -> UInt16 {
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// Create a machine and install the supplied program at address 0, setting the PC to run from there
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machine.setValue(0x0000, for: .programCounter)
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machine.setData(Data(_: program), atAddress: 0x0000)
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@ -19,15 +19,114 @@ class Z80MemptrTests: XCTestCase {
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// Set the initial value of memptr, run for the requested number of cycles,
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// return the new value
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machine.setValue(initialValue, for: .memPtr)
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machine.runForNumber(ofCycles: length)
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machine.runForInstruction()
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return machine.value(for: .memPtr)
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}
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fileprivate func insert16(program: inout [UInt8], address: Int, offset: size_t) {
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private func testPage(_ prefix: UInt8, exclusions: [Int]) {
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for opcode in 0 ..< 256 {
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if exclusions.contains(opcode) {
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continue
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}
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var program: [UInt8] = [
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(prefix != 0) ? prefix : UInt8(opcode), UInt8(opcode), 0, 0
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]
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let argumentPosition = (prefix != 0) ? 2 : 1
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for _ in 0 ..< 10 {
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let random = arc4random_uniform(65536)
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program[argumentPosition + 0] = UInt8(random & 0x00ff)
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program[argumentPosition + 1] = UInt8(random >> 8)
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let expectedResult = UInt16(arc4random_uniform(65536))
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let result = test(program: program, initialValue: expectedResult)
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XCTAssertEqual(result, expectedResult, "Failed for opcode \(String(opcode, radix:16))")
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// One failure will do.
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if result != expectedResult {
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break
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}
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}
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}
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}
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private func insert16(program: inout [UInt8], address: Int, offset: size_t) {
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program[offset] = UInt8(address & 0x00ff)
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program[offset + 1] = UInt8(address >> 8)
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}
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/// Tests that everything not listed in the documentation has no effect upon MEMPTR.
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func testStandardPageOthers() {
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testPage(0, exclusions: [
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0x02, // LD (BC), A
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0x09, // ADD HL, BC
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0x0a, // LD A, (BC)
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0x10, // DJNZ
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0x12, // LD (DE), A
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0x18, // JR
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0x19, // ADD HL, DE
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0x1a, // LD A, (DE)
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0x20, // JR NZ
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0x22, // LD (nn), HL
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0x28, // JR Z
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0x29, // ADD HL, HL
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0x30, // JR NC
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0x32, // LD (nn), A
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0x38, // JR C
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0x39, // ADD HL, SP
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0x3a, // LD A, (nn)
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0xcb, // CB page
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0xdd, // DD page
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0xed, // ED page
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0xfd, // FD page
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])
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}
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func testEDPageOthers() {
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testPage(0xed, exclusions: [
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0x42, // SBC HL, BC
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0x43, // LD (nn), HL
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0x45, // RETN (??)
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0x4a, // ADC HL, BC
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0x4d, // RETI
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0x52, // SBC HL, DE
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0x53, // LD (nn), DE
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0x55, // RETN (??)
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0x5a, // ADC HL, DE
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0x5d, // RETN (??)
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0x62, // SBC HL, HL
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0x63, // LD (nn), HL
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0x65, // RETN (??)
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0x67, // RRD
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0x6a, // ADC HL, HL
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0x6d, // RETN (??)
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0x6f, // RLD
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0x72, // SBC HL, SP
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0x73, // LD (nn), SP
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0x75, // RETN (??)
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0x78, // IN A, (C)
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0x79, // OUT (C), A
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0x7a, // ADC HL, SP
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0x7d, // RETN (??)
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0xa1, // CPI
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0xa2, // INI
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0xa3, // OUTI
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0xa9, // CPD
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0xaa, // IND
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0xab, // OUTD
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0xb1, // CPIR
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0xb3, // OUIR
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0xb9, // CPDR
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0xbb // OTDR
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])
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// testPage(0xcb, exclusions: [])
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// testPage(0xdd, exclusions: [])
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// testPage(0xfd, exclusions: [])
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}
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/*
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Re: comments below:
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All the CPU chips tested give the same results except KP1858BM1 and T34BM1 slices noted as "BM1".
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@ -44,7 +143,7 @@ class Z80MemptrTests: XCTestCase {
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program[2] = UInt8(addr >> 8)
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let expectedResult = UInt16((addr + 1) & 0xffff)
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let result = test(program: program, length: 13, initialValue: 0xffff)
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let result = test(program: program, initialValue: 0xffff)
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XCTAssertEqual(result, expectedResult)
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}
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}
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@ -73,9 +172,9 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16(((addr + 1) & 0xff) + (a << 8))
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let bcResult = test(program: bcProgram, length: 7, initialValue: 0xffff)
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let deResult = test(program: deProgram, length: 7, initialValue: 0xffff)
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let nnResult = test(program: nnProgram, length: 13, initialValue: 0xffff)
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let bcResult = test(program: bcProgram, initialValue: 0xffff)
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let deResult = test(program: deProgram, initialValue: 0xffff)
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let nnResult = test(program: nnProgram, initialValue: 0xffff)
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XCTAssertEqual(bcResult, expectedResult)
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XCTAssertEqual(deResult, expectedResult)
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@ -99,8 +198,8 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16((addr + 1) & 0xffff)
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let bcResult = test(program: bcProgram, length: 7, initialValue: 0xffff)
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let deResult = test(program: deProgram, length: 7, initialValue: 0xffff)
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let bcResult = test(program: bcProgram, initialValue: 0xffff)
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let deResult = test(program: deProgram, initialValue: 0xffff)
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XCTAssertEqual(bcResult, expectedResult)
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XCTAssertEqual(deResult, expectedResult)
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@ -135,11 +234,11 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16((addr + 1) & 0xffff)
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XCTAssertEqual(test(program: ldnnhlBaseProgram, length: 16, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnbcEDProgram, length: 20, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnndeEDProgram, length: 20, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnhlEDProgram, length: 20, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnspEDProgram, length: 20, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnhlBaseProgram, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnbcEDProgram, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnndeEDProgram, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnhlEDProgram, initialValue: expectedResult ^ 1), expectedResult)
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XCTAssertEqual(test(program: ldnnspEDProgram, initialValue: expectedResult ^ 1), expectedResult)
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}
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}
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@ -190,15 +289,15 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16((addr + 1) & 0xffff)
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XCTAssertEqual(test(program: hlBaseProgram, length: 16, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: hlBaseProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: bcEDProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: deEDProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: hlEDProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: spEDProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: bcEDProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: deEDProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: hlEDProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: spEDProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: ixProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: iyProgram, length: 20, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: ixProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: iyProgram, initialValue: 0xffff), expectedResult)
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}
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}
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@ -225,9 +324,9 @@ class Z80MemptrTests: XCTestCase {
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iyProgram[2] = UInt8(addr & 0x00ff)
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iyProgram[3] = UInt8(addr >> 8)
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XCTAssertEqual(test(program: hlProgram, length: 19, initialValue: 0xffff), UInt16(addr))
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XCTAssertEqual(test(program: ixProgram, length: 23, initialValue: 0xffff), UInt16(addr))
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XCTAssertEqual(test(program: iyProgram, length: 23, initialValue: 0xffff), UInt16(addr))
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XCTAssertEqual(test(program: hlProgram, initialValue: 0xffff), UInt16(addr))
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XCTAssertEqual(test(program: ixProgram, initialValue: 0xffff), UInt16(addr))
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XCTAssertEqual(test(program: iyProgram, initialValue: 0xffff), UInt16(addr))
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}
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}
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@ -248,9 +347,9 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16((addr + 1) & 0xffff)
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machine.setValue(UInt16(addr), for: .HL)
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XCTAssertEqual(test(program: addProgram, length: 11, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: adcProgram, length: 15, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: sbcProgram, length: 15, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: addProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: adcProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: sbcProgram, initialValue: 0xffff), expectedResult)
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}
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}
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@ -268,20 +367,132 @@ class Z80MemptrTests: XCTestCase {
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let expectedResult = UInt16((addr + 1) & 0xffff)
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machine.setValue(UInt16(addr), for: .HL)
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XCTAssertEqual(test(program: rldProgram, length: 18, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: rrdProgram, length: 18, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: rldProgram, initialValue: 0xffff), expectedResult)
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XCTAssertEqual(test(program: rrdProgram, initialValue: 0xffff), expectedResult)
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}
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}
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/* TODO:
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JR/DJNZ/RET/RETI/RST (jumping to addr)
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MEMPTR = addr
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(implemented in principle)
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*/
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func testJR() {
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var jrProgram: [UInt8] = [
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0x18, 0x00
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]
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for offset in 0 ..< 256 {
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jrProgram[1] = UInt8(offset)
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let result = test(program: jrProgram, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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func testJRcc() {
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func testJR(instruction: UInt8) {
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var program: [UInt8] = [
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instruction, 0x00
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]
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for offset in 0 ..< 256 {
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program[1] = UInt8(offset)
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let result = test(program: program, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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// JR NZ.
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machine.setValue(0x00, for: .AF)
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testJR(instruction: 0x20)
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machine.setValue(0xff, for: .AF)
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testJR(instruction: 0x20)
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// JR NC
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machine.setValue(0x00, for: .AF)
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testJR(instruction: 0x30)
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machine.setValue(0xff, for: .AF)
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testJR(instruction: 0x30)
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// JR Z
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machine.setValue(0x00, for: .AF)
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testJR(instruction: 0x28)
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machine.setValue(0x01, for: .AF)
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testJR(instruction: 0x28)
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// JR C
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machine.setValue(0x00, for: .AF)
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testJR(instruction: 0x38)
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machine.setValue(0x01, for: .AF)
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testJR(instruction: 0x38)
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}
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func testRST() {
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var rstProgram: [UInt8] = [
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0x00
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]
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for offset in 0 ..< 8 {
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rstProgram[0] = UInt8(offset << 3) + 0xc7
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let result = test(program: rstProgram, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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func testRET() {
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let retProgram: [UInt8] = [
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0xc9
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]
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for addr in 0 ..< 65536 {
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let stackContents: [UInt8] = [
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UInt8(addr & 0xff), UInt8(addr >> 8)
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]
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machine.setData(Data(stackContents), atAddress: 0xf001)
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machine.setValue(0xf000, for: .stackPointer)
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let result = test(program: retProgram, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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func testRETI() {
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let retiProgram: [UInt8] = [
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0xed, 0x4d
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]
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for addr in 0 ..< 65536 {
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let stackContents: [UInt8] = [
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UInt8(addr & 0xff), UInt8(addr >> 8)
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]
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machine.setData(Data(stackContents), atAddress: 0xf001)
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machine.setValue(0xf000, for: .stackPointer)
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let result = test(program: retiProgram, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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/* TODO:
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JP(except JP rp)/CALL addr (even in case of conditional call/jp, independently on condition satisfied or not)
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MEMPTR = addr
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*/
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func testCALL() {
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var callProgram: [UInt8] = [
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0xcd, 0x00, 0x00
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]
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for offset in 0 ..< 65536 {
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callProgram[1] = UInt8(offset & 0xff)
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callProgram[2] = UInt8(offset >> 8)
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let result = test(program: callProgram, initialValue: 0xffff)
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XCTAssertEqual(result, machine.value(for: .programCounter))
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}
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}
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/* TODO:
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IN A,(port)
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@ -101,9 +101,10 @@ template < class T,
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scheduled_program_counter_ = current_instruction_page_->instructions[operation_ & halt_mask_];
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break;
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case MicroOp::Increment16: (*static_cast<uint16_t *>(operation->source))++; break;
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case MicroOp::Increment8NoFlags: ++ *static_cast<uint8_t *>(operation->source); break;
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case MicroOp::Increment16: ++ *static_cast<uint16_t *>(operation->source); break;
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case MicroOp::IncrementPC: pc_.full += pc_increment_; break;
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case MicroOp::Decrement16: (*static_cast<uint16_t *>(operation->source))--; break;
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case MicroOp::Decrement16: -- *static_cast<uint16_t *>(operation->source); break;
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case MicroOp::Move8: *static_cast<uint8_t *>(operation->destination) = *static_cast<uint8_t *>(operation->source); break;
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case MicroOp::Move16: *static_cast<uint16_t *>(operation->destination) = *static_cast<uint16_t *>(operation->source); break;
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@ -180,6 +181,7 @@ template < class T,
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case MicroOp::DJNZ:
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bc_.halves.high--;
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if(!bc_.halves.high) {
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memptr_.full = pc_.full;
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advance_operation();
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}
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break;
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@ -480,7 +482,8 @@ template < class T,
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if(test) { \
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pc_.full -= 2; \
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} else { \
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advance_operation(); \
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memptr_.full = pc_.full - 1; \
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advance_operation(); \
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}
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#define LDxR_STEP(dir) \
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@ -514,9 +517,10 @@ template < class T,
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#undef LDxR_STEP
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#define CPxR_STEP(dir) \
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hl_.full += dir; \
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bc_.full--; \
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#define CPxR_STEP(dir) \
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hl_.full += dir; \
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memptr_.full += dir; \
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bc_.full--; \
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\
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uint8_t result = a_ - temp8_; \
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const uint8_t halfResult = (a_&0xf) - (temp8_&0xf); \
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@ -541,12 +545,10 @@ template < class T,
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} break;
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case MicroOp::CPD: {
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memptr_.full--;
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CPxR_STEP(-1);
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} break;
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|
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case MicroOp::CPI: {
|
||||
memptr_.full++;
|
||||
CPxR_STEP(1);
|
||||
} break;
|
||||
|
||||
@ -636,6 +638,7 @@ template < class T,
|
||||
case MicroOp::BIT: {
|
||||
const uint8_t result = *static_cast<uint8_t *>(operation->source) & (1 << ((operation_ >> 3)&7));
|
||||
|
||||
// Leak MEMPTR into bits 5 and 3 if this is either BIT n,(HL) or BIT n,(IX/IY+d).
|
||||
if(current_instruction_page_->is_indexed || ((operation_&0x07) == 6)) {
|
||||
bit53_result_ = memptr_.halves.high;
|
||||
} else {
|
||||
@ -797,13 +800,15 @@ template < class T,
|
||||
}
|
||||
break;
|
||||
|
||||
// MARK: - Input
|
||||
// MARK: - Input and Output
|
||||
|
||||
case MicroOp::SetInFlags:
|
||||
subtract_flag_ = half_carry_result_ = 0;
|
||||
sign_result_ = zero_result_ = bit53_result_ = *static_cast<uint8_t *>(operation->source);
|
||||
set_parity(sign_result_);
|
||||
set_did_compute_flags();
|
||||
set_did_compute_flags(); // deliberate fallthrough
|
||||
case MicroOp::SetOutFlags:
|
||||
|
||||
memptr_.full = bc_.full + 1;
|
||||
break;
|
||||
|
||||
|
||||
@ -20,6 +20,7 @@ class ProcessorStorage {
|
||||
DecodeOperationNoRChange,
|
||||
MoveToNextProgram,
|
||||
|
||||
Increment8NoFlags,
|
||||
Increment8,
|
||||
Increment16,
|
||||
Decrement8,
|
||||
@ -73,31 +74,45 @@ class ProcessorStorage {
|
||||
JumpTo66,
|
||||
HALT,
|
||||
|
||||
/// Decrements BC; if BC is 0 then moves to the next instruction. Otherwise allows this instruction to finish.
|
||||
DJNZ,
|
||||
|
||||
DAA,
|
||||
CPL,
|
||||
SCF,
|
||||
CCF,
|
||||
|
||||
/// Resets the bit in @c source implied by @c operation_ .
|
||||
RES,
|
||||
/// Tests the bit in @c source implied by @c operation_ .
|
||||
BIT,
|
||||
/// Sets the bit in @c source implied by @c operation_ .
|
||||
SET,
|
||||
|
||||
/// Sets @c memptr_ to the target address implied by @c operation_ .
|
||||
CalculateRSTDestination,
|
||||
|
||||
/// Resets subtract and carry, sets sign, zero, five and three according to the value of @c a_ and sets parity to the value of @c IFF2 .
|
||||
SetAFlags,
|
||||
/// Resets subtract and carry, sets sign, zero, five and three according to the value of @c operation and sets parity the same as sign.
|
||||
SetInFlags,
|
||||
/// Sets @c memptr_ to @c bc_.full+1 .
|
||||
SetOutFlags,
|
||||
/// Sets @c temp8_ to 0.
|
||||
SetZero,
|
||||
|
||||
/// A no-op; used in instruction lists to indicate where an index calculation should go if this is an I[X/Y]+d operation.
|
||||
IndexedPlaceHolder,
|
||||
|
||||
/// Sets @c memptr_ to (a_ << 8) + ((source_ + 1) & 0xff)
|
||||
SetAddrAMemptr,
|
||||
|
||||
/// Resets: IFF1, IFF2, interrupt mode, the PC, I and R; sets all flags, the SP to 0xffff and a_ to 0xff.
|
||||
Reset
|
||||
};
|
||||
Type type;
|
||||
void *source;
|
||||
void *destination;
|
||||
void *source = nullptr;
|
||||
void *destination = nullptr;
|
||||
PartialMachineCycle machine_cycle;
|
||||
};
|
||||
|
||||
@ -105,7 +120,7 @@ class ProcessorStorage {
|
||||
std::vector<MicroOp *> instructions;
|
||||
std::vector<MicroOp> all_operations;
|
||||
std::vector<MicroOp> fetch_decode_execute;
|
||||
MicroOp *fetch_decode_execute_data;
|
||||
MicroOp *fetch_decode_execute_data = nullptr;
|
||||
uint8_t r_step;
|
||||
bool is_indexed;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user