6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-03 11:30:02 +00:00
Code Issues Projects Releases Wiki Activity

Corrects DIVS negative flag.

Browse Source
This commit is contained in:
Thomas Harte 2019-08-04 20:36:33 -04:00
parent e3794c0c0e
commit 35b1a55c12
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -1076,15 +1076,15 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
break;
}
zero_result_ = decltype(zero_result_)(quotient);
negative_flag_ = zero_result_ & 0x8000;
overflow_flag_ = 0;
const uint16_t remainder = uint16_t(signed_dividend % signed_divisor);
const int signed_quotient = result_sign*int(quotient);
destination()->halves.high.full = remainder;
destination()->halves.low.full = uint16_t(signed_quotient);
zero_result_ = decltype(zero_result_)(signed_quotient);
negative_flag_ = zero_result_ & 0x8000;
overflow_flag_ = 0;
// Algorithm here: there is a fixed cost per unset bit
// in the first 15 bits of the unsigned quotient.
auto positive_quotient_bits = ~quotient & 0xfffe;