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Start to establish a memory map.
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@ -20,8 +20,44 @@
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#include <array>
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#include <array>
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#include <vector>
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#include <vector>
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namespace {
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enum class Zone {
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LogicallyMappedRAM,
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PhysicallyMappedRAM,
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IOControllers,
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LowROM,
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HighROM,
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VideoController,
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DMAAndMEMC,
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AddressTranslator,
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};
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constexpr std::array<Zone, 0x20> zones(bool is_read) {
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std::array<Zone, 0x20> zones{};
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for(size_t c = 0; c < zones.size(); c++) {
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const auto address = c << 21;
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if(address < 0x200'0000) {
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zones[c] = Zone::LogicallyMappedRAM;
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} else if(address < 0x300'0000) {
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zones[c] = Zone::PhysicallyMappedRAM;
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} else if(address < 0x340'0000) {
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zones[c] = Zone::IOControllers;
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} else if(address < 0x360'0000) {
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zones[c] = is_read ? Zone::LowROM : Zone::VideoController;
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} else if(address < 0x380'0000) {
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zones[c] = is_read ? Zone::LowROM : Zone::DMAAndMEMC;
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} else {
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zones[c] = is_read ? Zone::HighROM : Zone::AddressTranslator;
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}
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}
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return zones;
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}
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}
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namespace Archimedes {
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namespace Archimedes {
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/// Primarily models the MEMC.
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struct Memory {
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struct Memory {
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void set_rom(const std::vector<uint8_t> &rom) {
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void set_rom(const std::vector<uint8_t> &rom) {
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std::copy(
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std::copy(
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@ -35,7 +71,19 @@ struct Memory {
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(void)mode;
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(void)mode;
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(void)trans;
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(void)trans;
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printf("W of %08x to %08x [%lu]\n", source, address, sizeof(IntT));
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switch (write_zones_[(address >> 21) & 31]) {
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case Zone::DMAAndMEMC:
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// if(mode != InstructionSet::ARM::Mode::Supervisor) return false;
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if((address & 0b1110'0000'0000'0000'0000) == 0b1110'0000'0000'0000'0000) {
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printf("MEMC Control: %04x\n", source);
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break;
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}
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[[fallthrough]];
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default:
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printf("Unhandled W of %08x to %08x [%lu]\n", source, address, sizeof(IntT));
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break;
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}
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if(has_moved_rom_ && address < ram_.size()) {
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if(has_moved_rom_ && address < ram_.size()) {
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*reinterpret_cast<IntT *>(&ram_[address]) = source;
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*reinterpret_cast<IntT *>(&ram_[address]) = source;
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@ -49,6 +97,14 @@ struct Memory {
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(void)mode;
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(void)mode;
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(void)trans;
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(void)trans;
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switch (read_zones_[(address >> 21) & 31]) {
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case Zone::PhysicallyMappedRAM:
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// if(mode != InstructionSet::ARM::Mode::Supervisor) return false;
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source = *reinterpret_cast<const IntT *>(&ram_[address & (ram_.size() - 1)]);
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return true;
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default: break;
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}
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if(address >= 0x3800000) {
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if(address >= 0x3800000) {
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has_moved_rom_ = true;
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has_moved_rom_ = true;
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source = *reinterpret_cast<const IntT *>(&rom_[address - 0x3800000]);
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source = *reinterpret_cast<const IntT *>(&rom_[address - 0x3800000]);
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@ -68,6 +124,9 @@ struct Memory {
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bool has_moved_rom_ = false;
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bool has_moved_rom_ = false;
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std::array<uint8_t, 4*1024*1024> ram_{};
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std::array<uint8_t, 4*1024*1024> ram_{};
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std::array<uint8_t, 2*1024*1024> rom_;
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std::array<uint8_t, 2*1024*1024> rom_;
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static constexpr std::array<Zone, 0x20> read_zones_ = zones(true);
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static constexpr std::array<Zone, 0x20> write_zones_ = zones(false);
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};
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};
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class ConcreteMachine:
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class ConcreteMachine:
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