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Retains a little more of output controls.

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Thomas Harte 2021-11-01 17:15:36 -07:00
parent 2f1ce5fe43
commit 3976420b88
2 changed files with 20 additions and 6 deletions
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20
Machines/Amiga/Chipset.cpp
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@ -756,18 +756,26 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
case Write(0x0f4): bitplanes_.set_pointer<5, 16>(cycle.value16()); break; // BPL6PTH
case Write(0x0f6): bitplanes_.set_pointer<5, 0>(cycle.value16()); break; // BPL6PTL
case Write(0x100): // BPLCON0
bitplanes_.set_control(cycle.value16());
is_high_res_ = cycle.value16() & 0x8000;
break;
case Write(0x100): { // BPLCON0
const auto value = cycle.value16();
bitplanes_.set_control(value);
is_high_res_ = value & 0x8000;
hold_and_modify_ = value & 0x0800;
dual_playfields_ = value & 0x0400;
interlace_ = value & 0x0004;
} break;
case Write(0x102): { // BPLCON1
const uint8_t delay = cycle.value8_low();
odd_delay_ = delay & 0x0f;
even_delay_ = delay >> 4;
} break;
case Write(0x104): { // BPLCON2
const auto value = cycle.value16();
odd_priority_ = value & 7;
even_priority_ = (value >> 3) & 7;
even_over_odd_ = value & 0x40;
} break;
case Write(0x104): // BPLCON2
case Write(0x106): // BPLCON3 (ECS)
LOG("TODO: Bitplane control; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
break;

6
Machines/Amiga/Chipset.hpp
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@ -248,6 +248,12 @@ class Chipset: private ClockingHint::Observer {
BitplaneData next_bitplanes_, previous_bitplanes_;
bool has_next_bitplanes_ = false;
int odd_priority_ = 0, even_priority_ = 0;
bool even_over_odd_ = false;
bool hold_and_modify_ = false;
bool dual_playfields_ = false;
bool interlace_ = false;
class BitplaneShifter {
public:
/// Installs a new set of output pixels.