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Add test coverage for STM descending, proving nothing.

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This commit is contained in:
Thomas Harte 2024-03-15 14:55:17 -04:00
parent 9d08282e28
commit 3a899ea4be
3 changed files with 7 additions and 6 deletions
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7
Machines/Acorn/Archimedes/Archimedes.cpp
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@ -389,7 +389,7 @@ struct Interrupts {
// IRQ A.
case 0x3200010 & AddressMask:
value = irq_a_.status;
// logger.error().append("IRQ A status is %02x", value);
logger.error().append("IRQ A status is %02x", value);
return true;
case 0x3200014 & AddressMask:
value = irq_a_.request();
@ -403,7 +403,7 @@ struct Interrupts {
// IRQ B.
case 0x3200020 & AddressMask:
value = irq_b_.status;
// logger.error().append("IRQ B status is %02x", value);
logger.error().append("IRQ B status is %02x", value);
return true;
case 0x3200024 & AddressMask:
value = irq_b_.request();
@ -1041,7 +1041,8 @@ class ConcreteMachine:
// printf("");
// }
// log |= (executor_.pc() > 0x02000000 && executor_.pc() < 0x02000078);
// log |= executor_.pc() == 0x03811eb4;
log |= executor_.pc() == 0x0381201c;
// log = executor_.pc() == 0x0381202c;
// log |= (executor_.pc() > 0x03801000);
// log &= executor_.pc() != 0x03801a0c;

6
OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm
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@ -425,9 +425,9 @@ struct MemoryLedger {
continue;
}
if(instruction == 0xe1a0f001 && test_count == 1) {
printf("");
}
// if(instruction == 0xe1a0f001 && test_count == 1) {
// printf("");
// }
execute(instruction, *test);
NSMutableString *error = nil;

BIN
OSBindings/Mac/Clock SignalTests/Messy ARM/test.txt.gz
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