diff --git a/InstructionSets/68k/Decoder.cpp b/InstructionSets/68k/Decoder.cpp
index 5f7562000..ba9bdd8d0 100644
--- a/InstructionSets/68k/Decoder.cpp
+++ b/InstructionSets/68k/Decoder.cpp
@@ -316,6 +316,9 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
 			}
 
 		case OpT(Operation::Scc):
+		case OpT(Operation::NEGXb):	case OpT(Operation::NEGXw):	case OpT(Operation::NEGXl):
+		case OpT(Operation::CLRb):	case OpT(Operation::CLRw):	case OpT(Operation::CLRl):
+		case OpT(Operation::NEGb):	case OpT(Operation::NEGw):	case OpT(Operation::NEGl):
 			switch(original.mode<0>()) {
 				default: return original;
 
diff --git a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm
index 793de0f58..9908bd9ee 100644
--- a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm	
@@ -155,16 +155,29 @@ template <int index> NSString *operand(Preinstruction instruction) {
 			case Operation::DBcc:	instruction = @"DBcc";	break;
 			case Operation::Scc:	instruction = @"Scc";	break;
 
+			case Operation::Bccb:
+			case Operation::Bccl:
+			case Operation::Bccw:	instruction = @"Bcc";	break;
+
+			case Operation::BSRb:
+			case Operation::BSRl:
+			case Operation::BSRw:	instruction = @"BSR";	break;
+
+			case Operation::CLRb:	instruction = @"CLR.b";	break;
+			case Operation::CLRw:	instruction = @"CLR.w";	break;
+			case Operation::CLRl:	instruction = @"CLR.l";	break;
+
+			case Operation::NEGXb:	instruction = @"NEGX.b";	break;
+			case Operation::NEGXw:	instruction = @"NEGX.w";	break;
+			case Operation::NEGXl:	instruction = @"NEGX.l";	break;
+
+			case Operation::NEGb:	instruction = @"NEG.b";	break;
+			case Operation::NEGw:	instruction = @"NEG.w";	break;
+			case Operation::NEGl:	instruction = @"NEG.l";	break;
+
 			/*
 				TODO:
 
-				Bccb,	Bccl,	Bccw,
-				BSRb,	BSRl,	BSRw,
-
-				CLRb, CLRw, CLRl,
-				NEGXb, NEGXw, NEGXl,
-				NEGb, NEGw, NEGl,
-
 				ASLb, ASLw, ASLl, ASLm,
 				ASRb, ASRw, ASRl, ASRm,
 				LSLb, LSLw, LSLl, LSLm,