From 3ca9c38777ea81d269a6f6d00c7662b30301b1a9 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 2 Aug 2017 19:45:58 -0400 Subject: [PATCH] =?UTF-8?q?Attempted=20to=20move=20to=20more=20accurate=20?= =?UTF-8?q?bus=20reading=20=E2=80=94=20if=20control=20lines=20are=20set=20?= =?UTF-8?q?then=20all=20subsequent=20data=20inputs=20should=20act=20accord?= =?UTF-8?q?ing=20to=20the=20current=20control=20lines;=20changes=20to=20po?= =?UTF-8?q?rt=20input=20should=20be=20reflected=20live=20upon=20readings,?= =?UTF-8?q?=20etc.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Components/AY38910/AY38910.cpp | 36 +++++++++++++++++++++------------- Components/AY38910/AY38910.hpp | 2 ++ 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/Components/AY38910/AY38910.cpp b/Components/AY38910/AY38910.cpp index d3d7329c4..1a3f0b33e 100644 --- a/Components/AY38910/AY38910.cpp +++ b/Components/AY38910/AY38910.cpp @@ -166,6 +166,8 @@ void AY38910::evaluate_output_volume() { ); } +#pragma mark - Register manipulation + void AY38910::select_register(uint8_t r) { selected_register_ = r & 0xf; } @@ -227,16 +229,22 @@ uint8_t AY38910::get_register_value() { return registers_[selected_register_] | register_masks[selected_register_]; } +#pragma mark - Port handling + uint8_t AY38910::get_port_output(bool port_b) { return registers_[port_b ? 15 : 14]; } void AY38910::set_port_input(bool port_b, uint8_t value) { registers_[port_b ? 15 : 14] = value; + update_bus(); } +#pragma mark - Bus handling + void AY38910::set_data_input(uint8_t r) { data_input_ = r; + update_bus(); } uint8_t AY38910::get_data_output() { @@ -244,25 +252,25 @@ uint8_t AY38910::get_data_output() { } void AY38910::set_control_lines(ControlLines control_lines) { - ControlState new_state; switch((int)control_lines) { - default: new_state = Inactive; break; + default: control_state_ = Inactive; break; case (int)(BDIR | BC2 | BC1): case BDIR: - case BC1: new_state = LatchAddress; break; + case BC1: control_state_ = LatchAddress; break; - case (int)(BC2 | BC1): new_state = Read; break; - case (int)(BDIR | BC2): new_state = Write; break; + case (int)(BC2 | BC1): control_state_ = Read; break; + case (int)(BDIR | BC2): control_state_ = Write; break; } -// if(new_state != control_state_) { - control_state_ = new_state; - switch(new_state) { - default: break; - case LatchAddress: select_register(data_input_); break; - case Write: set_register_value(data_input_); break; - case Read: data_output_ = get_register_value(); break; - } -// } + update_bus(); +} + +void AY38910::update_bus() { + switch(control_state_) { + default: break; + case LatchAddress: select_register(data_input_); break; + case Write: set_register_value(data_input_); break; + case Read: data_output_ = get_register_value(); break; + } } diff --git a/Components/AY38910/AY38910.hpp b/Components/AY38910/AY38910.hpp index c079d7fce..8065990de 100644 --- a/Components/AY38910/AY38910.hpp +++ b/Components/AY38910/AY38910.hpp @@ -94,6 +94,8 @@ class AY38910: public ::Outputs::Filter { int16_t output_volume_; inline void evaluate_output_volume(); + + inline void update_bus(); }; };