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Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc.

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This commit is contained in:
Thomas Harte 2017-08-02 19:45:58 -04:00
parent 2d2cefb0b0
commit 3ca9c38777
2 changed files with 24 additions and 14 deletions
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36
Components/AY38910/AY38910.cpp
View File

@ -166,6 +166,8 @@ void AY38910::evaluate_output_volume() {
); );
} }
#pragma mark - Register manipulation
void AY38910::select_register(uint8_t r) { void AY38910::select_register(uint8_t r) {
selected_register_ = r & 0xf; selected_register_ = r & 0xf;
} }
@ -227,16 +229,22 @@ uint8_t AY38910::get_register_value() {
return registers_[selected_register_] | register_masks[selected_register_]; return registers_[selected_register_] | register_masks[selected_register_];
} }
#pragma mark - Port handling
uint8_t AY38910::get_port_output(bool port_b) { uint8_t AY38910::get_port_output(bool port_b) {
return registers_[port_b ? 15 : 14]; return registers_[port_b ? 15 : 14];
} }
void AY38910::set_port_input(bool port_b, uint8_t value) { void AY38910::set_port_input(bool port_b, uint8_t value) {
registers_[port_b ? 15 : 14] = value; registers_[port_b ? 15 : 14] = value;
update_bus();
} }
#pragma mark - Bus handling
void AY38910::set_data_input(uint8_t r) { void AY38910::set_data_input(uint8_t r) {
data_input_ = r; data_input_ = r;
update_bus();
} }
uint8_t AY38910::get_data_output() { uint8_t AY38910::get_data_output() {
@ -244,25 +252,25 @@ uint8_t AY38910::get_data_output() {
} }
void AY38910::set_control_lines(ControlLines control_lines) { void AY38910::set_control_lines(ControlLines control_lines) {
ControlState new_state;
switch((int)control_lines) { switch((int)control_lines) {
default: new_state = Inactive; break; default: control_state_ = Inactive; break;
case (int)(BDIR | BC2 | BC1): case (int)(BDIR | BC2 | BC1):
case BDIR: case BDIR:
case BC1: new_state = LatchAddress; break; case BC1: control_state_ = LatchAddress; break;
case (int)(BC2 | BC1): new_state = Read; break; case (int)(BC2 | BC1): control_state_ = Read; break;
case (int)(BDIR | BC2): new_state = Write; break; case (int)(BDIR | BC2): control_state_ = Write; break;
} }
// if(new_state != control_state_) { update_bus();
control_state_ = new_state; }
switch(new_state) {
default: break; void AY38910::update_bus() {
case LatchAddress: select_register(data_input_); break; switch(control_state_) {
case Write: set_register_value(data_input_); break; default: break;
case Read: data_output_ = get_register_value(); break; case LatchAddress: select_register(data_input_); break;
} case Write: set_register_value(data_input_); break;
// } case Read: data_output_ = get_register_value(); break;
}
} }

2
Components/AY38910/AY38910.hpp
View File

@ -94,6 +94,8 @@ class AY38910: public ::Outputs::Filter<AY38910> {
int16_t output_volume_; int16_t output_volume_;
inline void evaluate_output_volume(); inline void evaluate_output_volume();
inline void update_bus();
}; };
}; };